i8259.cc (5656:f548d22a2f71) | i8259.cc (5657:7539092b28ac) |
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1/* 2 * Copyright (c) 2004-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 15 unchanged lines hidden (view full) --- 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Gabe Black 29 */ 30 31#include "base/bitfield.hh" | 1/* 2 * Copyright (c) 2004-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 15 unchanged lines hidden (view full) --- 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Gabe Black 29 */ 30 31#include "base/bitfield.hh" |
32#include "dev/x86/i82094aa.hh" |
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32#include "dev/x86/i8259.hh" 33 | 33#include "dev/x86/i8259.hh" 34 |
35X86ISA::I8259::I8259(Params * p) : BasicPioDevice(p), IntDev(this), 36 latency(p->pio_latency), output(p->output), 37 mode(p->mode), slave(NULL), 38 IRR(0), ISR(0), IMR(0), 39 readIRR(true), initControlWord(0) 40{ 41 if (output) { 42 I8259 * master; 43 master = dynamic_cast<I8259 *>(output->getDevice()); 44 if (master) 45 master->setSlave(this); 46 I82094AA * ioApic; 47 ioApic = dynamic_cast<I82094AA *>(output->getDevice()); 48 if (ioApic) 49 ioApic->setExtIntPic(this); 50 } 51 pioSize = 2; 52} 53 |
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34Tick 35X86ISA::I8259::read(PacketPtr pkt) 36{ 37 assert(pkt->getSize() == 1); 38 switch(pkt->getAddr() - pioAddr) 39 { 40 case 0x0: 41 if (readIRR) { --- 142 unchanged lines hidden (view full) --- 184 } 185 return latency; 186} 187 188void 189X86ISA::I8259::signalInterrupt(int line) 190{ 191 DPRINTF(I8259, "Interrupt raised on line %d.\n", line); | 54Tick 55X86ISA::I8259::read(PacketPtr pkt) 56{ 57 assert(pkt->getSize() == 1); 58 switch(pkt->getAddr() - pioAddr) 59 { 60 case 0x0: 61 if (readIRR) { --- 142 unchanged lines hidden (view full) --- 204 } 205 return latency; 206} 207 208void 209X86ISA::I8259::signalInterrupt(int line) 210{ 211 DPRINTF(I8259, "Interrupt raised on line %d.\n", line); |
192 if (line > 7) 193 fatal("Line number %d doesn't exist. The max is 7.\n"); | 212 if (line >= NumLines) 213 fatal("Line number %d doesn't exist. The max is %d.\n", 214 line, NumLines - 1); |
194 if (bits(IMR, line)) { 195 DPRINTF(I8259, "Interrupt %d was masked.\n", line); 196 } else { | 215 if (bits(IMR, line)) { 216 DPRINTF(I8259, "Interrupt %d was masked.\n", line); 217 } else { |
197 if (output) { 198 DPRINTF(I8259, "Propogating interrupt.\n"); 199 output->signalInterrupt(); 200 } else { 201 warn("Received interrupt but didn't have " 202 "anyone to tell about it.\n"); | 218 IRR |= 1 << line; 219 if (bits(ISR, 7, line) == 0) { 220 if (output) { 221 DPRINTF(I8259, "Propogating interrupt.\n"); 222 output->signalInterrupt(); 223 } else { 224 warn("Received interrupt but didn't have " 225 "anyone to tell about it.\n"); 226 } |
203 } 204 } 205} 206 | 227 } 228 } 229} 230 |
231int 232X86ISA::I8259::getVector() 233{ 234 /* 235 * This code only handles one slave. Since that's how the PC platform 236 * always uses the 8259 PIC, there shouldn't be any need for more. If 237 * there -is- a need for more for some reason, "slave" can become a 238 * vector of slaves. 239 */ 240 int line = findMsbSet(IRR); 241 IRR &= ~(1 << line); 242 DPRINTF(I8259, "Interrupt %d was accepted.\n", line); 243 ISR |= 1 << line; 244 if (slave && bits(cascadeBits, line)) { 245 DPRINTF(I8259, "Interrupt was from slave who will " 246 "provide the vector.\n"); 247 return slave->getVector(); 248 } 249 return line | vectorOffset; 250} 251 |
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207X86ISA::I8259 * 208I8259Params::create() 209{ 210 return new X86ISA::I8259(this); 211} | 252X86ISA::I8259 * 253I8259Params::create() 254{ 255 return new X86ISA::I8259(this); 256} |