1/* 2 * Copyright (c) 2004-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 22 unchanged lines hidden (view full) --- 31#include "base/bitfield.hh" 32#include "dev/x86/i82094aa.hh" 33#include "dev/x86/i8259.hh" 34 35X86ISA::I8259::I8259(Params * p) : BasicPioDevice(p), IntDev(this), 36 latency(p->pio_latency), output(p->output), 37 mode(p->mode), slave(NULL), 38 IRR(0), ISR(0), IMR(0), |
39 readIRR(true), initControlWord(0), autoEOI(false) |
40{ 41 if (output) { 42 I8259 * master; 43 master = dynamic_cast<I8259 *>(output->getDevice()); 44 if (master) 45 master->setSlave(this); 46 I82094AA * ioApic; 47 ioApic = dynamic_cast<I82094AA *>(output->getDevice()); --- 38 unchanged lines hidden (view full) --- 86 IMR = 0; 87 edgeTriggered = bits(val, 3); 88 DPRINTF(I8259, "%s triggered mode.\n", 89 edgeTriggered ? "Edge" : "Level"); 90 cascadeMode = !bits(val, 1); 91 DPRINTF(I8259, "%s mode.\n", 92 cascadeMode ? "Cascade" : "Single"); 93 expectICW4 = bits(val, 0); |
94 if (!expectICW4) { 95 autoEOI = false; 96 } |
97 initControlWord = 1; 98 DPRINTF(I8259, "Expecting %d more bytes.\n", expectICW4 ? 3 : 2); 99 } else if (bits(val, 4, 3) == 0) { 100 DPRINTF(I8259, "Received operation command word 2.\n"); 101 switch (bits(val, 7, 5)) { 102 case 0x0: 103 DPRINTF(I8259, 104 "Subcommand: Rotate in auto-EOI mode (clear).\n"); --- 96 unchanged lines hidden (view full) --- 201 } 202 if (bits(val, 3) == 0) { 203 DPRINTF(I8259, "Nonbuffered.\n"); 204 } else if (bits(val, 2) == 0) { 205 DPRINTF(I8259, "Buffered.\n"); 206 } else { 207 DPRINTF(I8259, "Unrecognized buffer mode.\n"); 208 } |
209 autoEOI = bits(val, 1); |
210 DPRINTF(I8259, "%s End Of Interrupt.\n", |
211 autoEOI ? "Automatic" : "Normal"); 212 |
213 DPRINTF(I8259, "%s mode.\n", bits(val, 0) ? "80x86" : "MCX-80/85"); 214 initControlWord = 0; 215 break; 216 } 217 break; 218 } 219 return latency; 220} --- 44 unchanged lines hidden (view full) --- 265 * This code only handles one slave. Since that's how the PC platform 266 * always uses the 8259 PIC, there shouldn't be any need for more. If 267 * there -is- a need for more for some reason, "slave" can become a 268 * vector of slaves. 269 */ 270 int line = findMsbSet(IRR); 271 IRR &= ~(1 << line); 272 DPRINTF(I8259, "Interrupt %d was accepted.\n", line); |
273 if (autoEOI) { 274 handleEOI(line); 275 } else { 276 ISR |= 1 << line; 277 } |
278 if (slave && bits(cascadeBits, line)) { 279 DPRINTF(I8259, "Interrupt was from slave who will " 280 "provide the vector.\n"); 281 return slave->getVector(); 282 } 283 return line | vectorOffset; 284} 285 286X86ISA::I8259 * 287I8259Params::create() 288{ 289 return new X86ISA::I8259(this); 290} |