i8254.cc (11793:ef606668d247) i8254.cc (13229:b45254f2733a)
1/*
2 * Copyright (c) 2008 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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47}
48
49Tick
50X86ISA::I8254::read(PacketPtr pkt)
51{
52 assert(pkt->getSize() == 1);
53 Addr offset = pkt->getAddr() - pioAddr;
54 if (offset < 3) {
1/*
2 * Copyright (c) 2008 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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47}
48
49Tick
50X86ISA::I8254::read(PacketPtr pkt)
51{
52 assert(pkt->getSize() == 1);
53 Addr offset = pkt->getAddr() - pioAddr;
54 if (offset < 3) {
55 pkt->set(pit.readCounter(offset));
55 pkt->setLE(pit.readCounter(offset));
56 } else if (offset == 3) {
56 } else if (offset == 3) {
57 pkt->set(uint8_t(-1));
57 pkt->setLE(uint8_t(-1));
58 } else {
59 panic("Read from undefined i8254 register.\n");
60 }
61 pkt->makeAtomicResponse();
62 return latency;
63}
64
65Tick
66X86ISA::I8254::write(PacketPtr pkt)
67{
68 assert(pkt->getSize() == 1);
69 Addr offset = pkt->getAddr() - pioAddr;
70 if (offset < 3) {
58 } else {
59 panic("Read from undefined i8254 register.\n");
60 }
61 pkt->makeAtomicResponse();
62 return latency;
63}
64
65Tick
66X86ISA::I8254::write(PacketPtr pkt)
67{
68 assert(pkt->getSize() == 1);
69 Addr offset = pkt->getAddr() - pioAddr;
70 if (offset < 3) {
71 pit.writeCounter(offset, pkt->get());
71 pit.writeCounter(offset, pkt->getLE<uint8_t>());
72 } else if (offset == 3) {
72 } else if (offset == 3) {
73 pit.writeControl(pkt->get());
73 pit.writeControl(pkt->getLE<uint8_t>());
74 } else {
75 panic("Write to undefined i8254 register.\n");
76 }
77 pkt->makeAtomicResponse();
78 return latency;
79}
80
81void

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74 } else {
75 panic("Write to undefined i8254 register.\n");
76 }
77 pkt->makeAtomicResponse();
78 return latency;
79}
80
81void

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