1/*
2 * Copyright (c) 2008 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 */
30
31#include "dev/x86/i8254.hh"
32#include "dev/x86/intdev.hh"
33#include "mem/packet.hh"
34#include "mem/packet_access.hh"
35
36void
37X86ISA::I8254::counterInterrupt(unsigned int num)
38{
39 DPRINTF(I8254, "Interrupt from counter %d.\n", num);
40 if (num == 0) {
41 intPin->raise();
42 //XXX This is a hack.
43 intPin->lower();
44 }
45}
46
47Tick
48X86ISA::I8254::read(PacketPtr pkt)
49{
50 assert(pkt->getSize() == 1);
51 Addr offset = pkt->getAddr() - pioAddr;
52 if (offset < 3) {
53 pkt->set(pit.readCounter(offset));
54 } else if (offset == 3) {
55 pkt->set(uint8_t(-1));
56 } else {
57 panic("Read from undefined i8254 register.\n");
58 }
59 pkt->makeAtomicResponse();
60 return latency;
61}
62
63Tick
64X86ISA::I8254::write(PacketPtr pkt)
65{
66 assert(pkt->getSize() == 1);
67 Addr offset = pkt->getAddr() - pioAddr;
68 if (offset < 3) {
69 pit.writeCounter(offset, pkt->get<uint8_t>());
70 } else if (offset == 3) {
71 pit.writeControl(pkt->get<uint8_t>());
72 } else {
73 panic("Write to undefined i8254 register.\n");
74 }
75 pkt->makeAtomicResponse();
76 return latency;
77}
78
79void
80X86ISA::I8254::serialize(std::ostream &os)
81{
82 pit.serialize("pit", os);
83}
84
85void
86X86ISA::I8254::unserialize(Checkpoint *cp, const std::string &section)
87{
88 pit.unserialize("pit", cp, section);
89}
90
91X86ISA::I8254 *
92I8254Params::create()
93{
94 return new X86ISA::I8254(this);
95}