i8237.cc (5818:b47de42ec8b2) | i8237.cc (5898:541097c69e22) |
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1/* 2 * Copyright (c) 2008 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 49 unchanged lines hidden (view full) --- 58 case 0x7: 59 panic("Read from i8237 channel 3 remaining " 60 "word count unimplemented.\n"); 61 case 0x8: 62 panic("Read from i8237 status register unimplemented.\n"); 63 default: 64 panic("Read from undefined i8237 register %d.\n", offset); 65 } | 1/* 2 * Copyright (c) 2008 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 49 unchanged lines hidden (view full) --- 58 case 0x7: 59 panic("Read from i8237 channel 3 remaining " 60 "word count unimplemented.\n"); 61 case 0x8: 62 panic("Read from i8237 status register unimplemented.\n"); 63 default: 64 panic("Read from undefined i8237 register %d.\n", offset); 65 } |
66 pkt->makeAtomicResponse(); |
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66 return latency; 67} 68 69Tick 70X86ISA::I8237::write(PacketPtr pkt) 71{ 72 assert(pkt->getSize() == 1); 73 Addr offset = pkt->getAddr() - pioAddr; --- 41 unchanged lines hidden (view full) --- 115 panic("Write to i8237 master clear/reset register unimplemented.\n"); 116 case 0xe: 117 panic("Write to i8237 clear mask register unimplemented.\n"); 118 case 0xf: 119 panic("Write to i8237 write all mask register bits unimplemented.\n"); 120 default: 121 panic("Write to undefined i8254 register.\n"); 122 } | 67 return latency; 68} 69 70Tick 71X86ISA::I8237::write(PacketPtr pkt) 72{ 73 assert(pkt->getSize() == 1); 74 Addr offset = pkt->getAddr() - pioAddr; --- 41 unchanged lines hidden (view full) --- 116 panic("Write to i8237 master clear/reset register unimplemented.\n"); 117 case 0xe: 118 panic("Write to i8237 clear mask register unimplemented.\n"); 119 case 0xf: 120 panic("Write to i8237 write all mask register bits unimplemented.\n"); 121 default: 122 panic("Write to undefined i8254 register.\n"); 123 } |
124 pkt->makeAtomicResponse(); |
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123 return latency; 124} 125 126X86ISA::I8237 * 127I8237Params::create() 128{ 129 return new X86ISA::I8237(this); 130} | 125 return latency; 126} 127 128X86ISA::I8237 * 129I8237Params::create() 130{ 131 return new X86ISA::I8237(this); 132} |