i82094aa.hh (9294:8fb03b13de02) i82094aa.hh (9805:a4339e26b429)
1/*
2 * Copyright (c) 2008 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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39#include "params/I82094AA.hh"
40
41namespace X86ISA
42{
43
44class I8259;
45class Interrupts;
46
1/*
2 * Copyright (c) 2008 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 30 unchanged lines hidden (view full) ---

39#include "params/I82094AA.hh"
40
41namespace X86ISA
42{
43
44class I8259;
45class Interrupts;
46
47class I82094AA : public PioDevice, public IntDev
47class I82094AA : public BasicPioDevice, public IntDev
48{
49 public:
50 BitUnion64(RedirTableEntry)
51 Bitfield<63, 32> topDW;
52 Bitfield<55, 32> topReserved;
53 Bitfield<31, 0> bottomDW;
54 Bitfield<31, 17> bottomReserved;
55 Bitfield<63, 56> dest;
56 Bitfield<16> mask;
57 Bitfield<15> trigger;
58 Bitfield<14> remoteIRR;
59 Bitfield<13> polarity;
60 Bitfield<12> deliveryStatus;
61 Bitfield<11> destMode;
62 Bitfield<10, 8> deliveryMode;
63 Bitfield<7, 0> vector;
64 EndBitUnion(RedirTableEntry)
65
66 protected:
48{
49 public:
50 BitUnion64(RedirTableEntry)
51 Bitfield<63, 32> topDW;
52 Bitfield<55, 32> topReserved;
53 Bitfield<31, 0> bottomDW;
54 Bitfield<31, 17> bottomReserved;
55 Bitfield<63, 56> dest;
56 Bitfield<16> mask;
57 Bitfield<15> trigger;
58 Bitfield<14> remoteIRR;
59 Bitfield<13> polarity;
60 Bitfield<12> deliveryStatus;
61 Bitfield<11> destMode;
62 Bitfield<10, 8> deliveryMode;
63 Bitfield<7, 0> vector;
64 EndBitUnion(RedirTableEntry)
65
66 protected:
67 Tick latency;
68 Addr pioAddr;
69
70 I8259 * extIntPic;
71
72 uint8_t regSel;
73 uint8_t initialApicId;
74 uint8_t id;
75 uint8_t arbId;
76
77 uint64_t lowestPriorityOffset;

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95
96 I82094AA(Params *p);
97
98 void init();
99
100 Tick read(PacketPtr pkt);
101 Tick write(PacketPtr pkt);
102
67 I8259 * extIntPic;
68
69 uint8_t regSel;
70 uint8_t initialApicId;
71 uint8_t id;
72 uint8_t arbId;
73
74 uint64_t lowestPriorityOffset;

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92
93 I82094AA(Params *p);
94
95 void init();
96
97 Tick read(PacketPtr pkt);
98 Tick write(PacketPtr pkt);
99
103 AddrRangeList getAddrRanges() const
104 {
105 AddrRangeList ranges;
106 ranges.push_back(RangeEx(pioAddr, pioAddr + 4));
107 ranges.push_back(RangeEx(pioAddr + 16, pioAddr + 20));
108 return ranges;
109 }
100 AddrRangeList getIntAddrRange() const;
110
101
111 AddrRangeList getIntAddrRange() const
112 {
113 AddrRangeList ranges;
114 ranges.push_back(RangeEx(x86InterruptAddress(initialApicId, 0),
115 x86InterruptAddress(initialApicId, 0) +
116 PhysAddrAPICRangeSize));
117 return ranges;
118 }
119
120 void writeReg(uint8_t offset, uint32_t value);
121 uint32_t readReg(uint8_t offset);
122
123 BaseMasterPort &getMasterPort(const std::string &if_name,
102 void writeReg(uint8_t offset, uint32_t value);
103 uint32_t readReg(uint8_t offset);
104
105 BaseMasterPort &getMasterPort(const std::string &if_name,
124 PortID idx = InvalidPortID)
125 {
126 if (if_name == "int_master")
127 return intMasterPort;
128 return PioDevice::getMasterPort(if_name, idx);
129 }
106 PortID idx = InvalidPortID);
130
131 void signalInterrupt(int line);
132 void raiseInterruptPin(int number);
133 void lowerInterruptPin(int number);
134
135 virtual void serialize(std::ostream &os);
136 virtual void unserialize(Checkpoint *cp, const std::string &section);
137};
138
139} // namespace X86ISA
140
141#endif //__DEV_X86_SOUTH_BRIDGE_I8254_HH__
107
108 void signalInterrupt(int line);
109 void raiseInterruptPin(int number);
110 void lowerInterruptPin(int number);
111
112 virtual void serialize(std::ostream &os);
113 virtual void unserialize(Checkpoint *cp, const std::string &section);
114};
115
116} // namespace X86ISA
117
118#endif //__DEV_X86_SOUTH_BRIDGE_I8254_HH__