1/*
2 * Copyright (c) 2008 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 */
30
31#ifndef __DEV_X86_I82094AA_HH__
32#define __DEV_X86_I82094AA_HH__
33
34#include <map>
35
36#include "base/bitunion.hh"
37#include "dev/x86/intdev.hh"
38#include "dev/io_device.hh"
39#include "params/I82094AA.hh"
40
41namespace X86ISA
42{
43
44class I8259;
45class Interrupts;
46
47class I82094AA : public PioDevice, public IntDev
48{
49 public:
50 BitUnion64(RedirTableEntry)
51 Bitfield<63, 32> topDW;
52 Bitfield<55, 32> topReserved;
53 Bitfield<31, 0> bottomDW;
54 Bitfield<31, 17> bottomReserved;
55 Bitfield<63, 56> dest;
56 Bitfield<16> mask;
57 Bitfield<15> trigger;
58 Bitfield<14> remoteIRR;
59 Bitfield<13> polarity;
60 Bitfield<12> deliveryStatus;
61 Bitfield<11> destMode;
62 Bitfield<10, 8> deliveryMode;
63 Bitfield<7, 0> vector;
64 EndBitUnion(RedirTableEntry)
65
66 protected:
67 Tick latency;
68 Addr pioAddr;
69
70 I8259 * extIntPic;
71
72 uint8_t regSel;
73 uint8_t initialApicId;
74 uint8_t id;
75 uint8_t arbId;
76
77 uint64_t lowestPriorityOffset;
78
79 static const uint8_t TableSize = 24;
80 // This implementation is based on version 0x11, but 0x14 avoids having
81 // to deal with the arbitration and APIC bus guck.
82 static const uint8_t APICVersion = 0x14;
83
84 RedirTableEntry redirTable[TableSize];
85 bool pinStates[TableSize];
86
87 public:
88 typedef I82094AAParams Params;
89
90 const Params *
91 params() const
92 {
93 return dynamic_cast<const Params *>(_params);
94 }
95
96 I82094AA(Params *p);
97
98 void init();
99
100 Tick read(PacketPtr pkt);
101 Tick write(PacketPtr pkt);
102
103 AddrRangeList getAddrRanges() const
104 {
105 AddrRangeList ranges;
106 ranges.push_back(RangeEx(pioAddr, pioAddr + 4));
107 ranges.push_back(RangeEx(pioAddr + 16, pioAddr + 20));
108 return ranges;
109 }
110
111 AddrRangeList getIntAddrRange() const
112 {
113 AddrRangeList ranges;
114 ranges.push_back(RangeEx(x86InterruptAddress(initialApicId, 0),
115 x86InterruptAddress(initialApicId, 0) +
116 PhysAddrAPICRangeSize));
117 return ranges;
118 }
119
120 void writeReg(uint8_t offset, uint32_t value);
121 uint32_t readReg(uint8_t offset);
122
| 1/*
2 * Copyright (c) 2008 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 */
30
31#ifndef __DEV_X86_I82094AA_HH__
32#define __DEV_X86_I82094AA_HH__
33
34#include <map>
35
36#include "base/bitunion.hh"
37#include "dev/x86/intdev.hh"
38#include "dev/io_device.hh"
39#include "params/I82094AA.hh"
40
41namespace X86ISA
42{
43
44class I8259;
45class Interrupts;
46
47class I82094AA : public PioDevice, public IntDev
48{
49 public:
50 BitUnion64(RedirTableEntry)
51 Bitfield<63, 32> topDW;
52 Bitfield<55, 32> topReserved;
53 Bitfield<31, 0> bottomDW;
54 Bitfield<31, 17> bottomReserved;
55 Bitfield<63, 56> dest;
56 Bitfield<16> mask;
57 Bitfield<15> trigger;
58 Bitfield<14> remoteIRR;
59 Bitfield<13> polarity;
60 Bitfield<12> deliveryStatus;
61 Bitfield<11> destMode;
62 Bitfield<10, 8> deliveryMode;
63 Bitfield<7, 0> vector;
64 EndBitUnion(RedirTableEntry)
65
66 protected:
67 Tick latency;
68 Addr pioAddr;
69
70 I8259 * extIntPic;
71
72 uint8_t regSel;
73 uint8_t initialApicId;
74 uint8_t id;
75 uint8_t arbId;
76
77 uint64_t lowestPriorityOffset;
78
79 static const uint8_t TableSize = 24;
80 // This implementation is based on version 0x11, but 0x14 avoids having
81 // to deal with the arbitration and APIC bus guck.
82 static const uint8_t APICVersion = 0x14;
83
84 RedirTableEntry redirTable[TableSize];
85 bool pinStates[TableSize];
86
87 public:
88 typedef I82094AAParams Params;
89
90 const Params *
91 params() const
92 {
93 return dynamic_cast<const Params *>(_params);
94 }
95
96 I82094AA(Params *p);
97
98 void init();
99
100 Tick read(PacketPtr pkt);
101 Tick write(PacketPtr pkt);
102
103 AddrRangeList getAddrRanges() const
104 {
105 AddrRangeList ranges;
106 ranges.push_back(RangeEx(pioAddr, pioAddr + 4));
107 ranges.push_back(RangeEx(pioAddr + 16, pioAddr + 20));
108 return ranges;
109 }
110
111 AddrRangeList getIntAddrRange() const
112 {
113 AddrRangeList ranges;
114 ranges.push_back(RangeEx(x86InterruptAddress(initialApicId, 0),
115 x86InterruptAddress(initialApicId, 0) +
116 PhysAddrAPICRangeSize));
117 return ranges;
118 }
119
120 void writeReg(uint8_t offset, uint32_t value);
121 uint32_t readReg(uint8_t offset);
122
|