i82094aa.cc (8739:925f15f96322) i82094aa.cc (8746:42d3554b1c35)
1/*
2 * Copyright (c) 2008 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 */
30
31#include "config/full_system.hh"
32
1/*
2 * Copyright (c) 2008 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 */
30
31#include "config/full_system.hh"
32
33#if FULL_SYSTEM
34#include "arch/x86/interrupts.hh"
33#include "arch/x86/interrupts.hh"
35#endif
36
37#include "arch/x86/intmessage.hh"
34#include "arch/x86/intmessage.hh"
35#include "cpu/base.hh"
38#include "debug/I82094AA.hh"
39#include "dev/x86/i82094aa.hh"
40#include "dev/x86/i8259.hh"
41#include "mem/packet.hh"
42#include "mem/packet_access.hh"
43#include "sim/system.hh"
44
45X86ISA::I82094AA::I82094AA(Params *p) : PioDevice(p),

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167{
168 DPRINTF(I82094AA, "Received interrupt %d.\n", line);
169 assert(line < TableSize);
170 RedirTableEntry entry = redirTable[line];
171 if (entry.mask) {
172 DPRINTF(I82094AA, "Entry was masked.\n");
173 return;
174 } else {
36#include "debug/I82094AA.hh"
37#include "dev/x86/i82094aa.hh"
38#include "dev/x86/i8259.hh"
39#include "mem/packet.hh"
40#include "mem/packet_access.hh"
41#include "sim/system.hh"
42
43X86ISA::I82094AA::I82094AA(Params *p) : PioDevice(p),

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165{
166 DPRINTF(I82094AA, "Received interrupt %d.\n", line);
167 assert(line < TableSize);
168 RedirTableEntry entry = redirTable[line];
169 if (entry.mask) {
170 DPRINTF(I82094AA, "Entry was masked.\n");
171 return;
172 } else {
175#if FULL_SYSTEM //XXX No interrupt controller in SE mode.
176 TriggerIntMessage message = 0;
177 message.destination = entry.dest;
178 if (entry.deliveryMode == DeliveryMode::ExtInt) {
179 assert(extIntPic);
180 message.vector = extIntPic->getVector();
181 } else {
182 message.vector = entry.vector;
183 }

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197 for (int i = 0; i < numContexts; i++) {
198 apics.push_back(i);
199 }
200 } else {
201 apics.push_back(message.destination);
202 }
203 } else {
204 for (int i = 0; i < numContexts; i++) {
173 TriggerIntMessage message = 0;
174 message.destination = entry.dest;
175 if (entry.deliveryMode == DeliveryMode::ExtInt) {
176 assert(extIntPic);
177 message.vector = extIntPic->getVector();
178 } else {
179 message.vector = entry.vector;
180 }

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194 for (int i = 0; i < numContexts; i++) {
195 apics.push_back(i);
196 }
197 } else {
198 apics.push_back(message.destination);
199 }
200 } else {
201 for (int i = 0; i < numContexts; i++) {
205 std::map<int, Interrupts *>::iterator localApicIt =
206 localApics.find(i);
207 assert(localApicIt != localApics.end());
208 Interrupts *localApic = localApicIt->second;
202 Interrupts *localApic = sys->getThreadContext(i)->
203 getCpuPtr()->getInterruptController();
209 if ((localApic->readReg(APIC_LOGICAL_DESTINATION) >> 24) &
210 message.destination) {
204 if ((localApic->readReg(APIC_LOGICAL_DESTINATION) >> 24) &
205 message.destination) {
211 apics.push_back(localApicIt->first);
206 apics.push_back(localApic->getInitialApicId());
212 }
213 }
214 if (message.deliveryMode == DeliveryMode::LowestPriority &&
215 apics.size()) {
216 // The manual seems to suggest that the chipset just does
217 // something reasonable for these instead of actually using
218 // state from the local APIC. We'll just rotate an offset
219 // through the set of APICs selected above.

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226 }
227 int selected = *apicIt;
228 apics.clear();
229 apics.push_back(selected);
230 }
231 }
232 intPort->sendMessage(apics, message,
233 sys->getMemoryMode() == Enums::timing);
207 }
208 }
209 if (message.deliveryMode == DeliveryMode::LowestPriority &&
210 apics.size()) {
211 // The manual seems to suggest that the chipset just does
212 // something reasonable for these instead of actually using
213 // state from the local APIC. We'll just rotate an offset
214 // through the set of APICs selected above.

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221 }
222 int selected = *apicIt;
223 apics.clear();
224 apics.push_back(selected);
225 }
226 }
227 intPort->sendMessage(apics, message,
228 sys->getMemoryMode() == Enums::timing);
234#endif
235 }
236}
237
238void
239X86ISA::I82094AA::raiseInterruptPin(int number)
240{
241 assert(number < TableSize);
242 if (!pinStates[number])

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247void
248X86ISA::I82094AA::lowerInterruptPin(int number)
249{
250 assert(number < TableSize);
251 pinStates[number] = false;
252}
253
254void
229 }
230}
231
232void
233X86ISA::I82094AA::raiseInterruptPin(int number)
234{
235 assert(number < TableSize);
236 if (!pinStates[number])

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241void
242X86ISA::I82094AA::lowerInterruptPin(int number)
243{
244 assert(number < TableSize);
245 pinStates[number] = false;
246}
247
248void
255X86ISA::I82094AA::registerLocalApic(int initialId, Interrupts *localApic)
256{
257 assert(localApic);
258 localApics[initialId] = localApic;
259}
260
261void
262X86ISA::I82094AA::serialize(std::ostream &os)
263{
264 uint64_t* redirTableArray = (uint64_t*)redirTable;
265 SERIALIZE_SCALAR(regSel);
266 SERIALIZE_SCALAR(initialApicId);
267 SERIALIZE_SCALAR(id);
268 SERIALIZE_SCALAR(arbId);
269 SERIALIZE_SCALAR(lowestPriorityOffset);

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250{
251 uint64_t* redirTableArray = (uint64_t*)redirTable;
252 SERIALIZE_SCALAR(regSel);
253 SERIALIZE_SCALAR(initialApicId);
254 SERIALIZE_SCALAR(id);
255 SERIALIZE_SCALAR(arbId);
256 SERIALIZE_SCALAR(lowestPriorityOffset);

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