i82094aa.cc (8232:b28d06a175be) i82094aa.cc (8739:925f15f96322)
1/*
2 * Copyright (c) 2008 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 14 unchanged lines hidden (view full) ---

23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 */
30
1/*
2 * Copyright (c) 2008 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 14 unchanged lines hidden (view full) ---

23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 */
30
31#include "config/full_system.hh"
32
33#if FULL_SYSTEM
31#include "arch/x86/interrupts.hh"
34#include "arch/x86/interrupts.hh"
35#endif
36
32#include "arch/x86/intmessage.hh"
33#include "debug/I82094AA.hh"
34#include "dev/x86/i82094aa.hh"
35#include "dev/x86/i8259.hh"
36#include "mem/packet.hh"
37#include "mem/packet_access.hh"
38#include "sim/system.hh"
39

--- 122 unchanged lines hidden (view full) ---

162{
163 DPRINTF(I82094AA, "Received interrupt %d.\n", line);
164 assert(line < TableSize);
165 RedirTableEntry entry = redirTable[line];
166 if (entry.mask) {
167 DPRINTF(I82094AA, "Entry was masked.\n");
168 return;
169 } else {
37#include "arch/x86/intmessage.hh"
38#include "debug/I82094AA.hh"
39#include "dev/x86/i82094aa.hh"
40#include "dev/x86/i8259.hh"
41#include "mem/packet.hh"
42#include "mem/packet_access.hh"
43#include "sim/system.hh"
44

--- 122 unchanged lines hidden (view full) ---

167{
168 DPRINTF(I82094AA, "Received interrupt %d.\n", line);
169 assert(line < TableSize);
170 RedirTableEntry entry = redirTable[line];
171 if (entry.mask) {
172 DPRINTF(I82094AA, "Entry was masked.\n");
173 return;
174 } else {
175#if FULL_SYSTEM //XXX No interrupt controller in SE mode.
170 TriggerIntMessage message = 0;
171 message.destination = entry.dest;
172 if (entry.deliveryMode == DeliveryMode::ExtInt) {
173 assert(extIntPic);
174 message.vector = extIntPic->getVector();
175 } else {
176 message.vector = entry.vector;
177 }

--- 42 unchanged lines hidden (view full) ---

220 }
221 int selected = *apicIt;
222 apics.clear();
223 apics.push_back(selected);
224 }
225 }
226 intPort->sendMessage(apics, message,
227 sys->getMemoryMode() == Enums::timing);
176 TriggerIntMessage message = 0;
177 message.destination = entry.dest;
178 if (entry.deliveryMode == DeliveryMode::ExtInt) {
179 assert(extIntPic);
180 message.vector = extIntPic->getVector();
181 } else {
182 message.vector = entry.vector;
183 }

--- 42 unchanged lines hidden (view full) ---

226 }
227 int selected = *apicIt;
228 apics.clear();
229 apics.push_back(selected);
230 }
231 }
232 intPort->sendMessage(apics, message,
233 sys->getMemoryMode() == Enums::timing);
234#endif
228 }
229}
230
231void
232X86ISA::I82094AA::raiseInterruptPin(int number)
233{
234 assert(number < TableSize);
235 if (!pinStates[number])

--- 52 unchanged lines hidden --- 		235 }
236}
237
238void
239X86ISA::I82094AA::raiseInterruptPin(int number)
240{
241 assert(number < TableSize);
242 if (!pinStates[number])

--- 52 unchanged lines hidden ---