i82094aa.cc (7903:7fcfb515d7bf) i82094aa.cc (7913:70b56a9ac1b2)
1/*
2 * Copyright (c) 2008 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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36#include "mem/packet_access.hh"
37#include "sim/system.hh"
38
39X86ISA::I82094AA::I82094AA(Params *p) : PioDevice(p),
40 IntDev(this, p->int_latency),
41 latency(p->pio_latency), pioAddr(p->pio_addr),
42 extIntPic(p->external_int_pic), lowestPriorityOffset(0)
43{
1/*
2 * Copyright (c) 2008 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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36#include "mem/packet_access.hh"
37#include "sim/system.hh"
38
39X86ISA::I82094AA::I82094AA(Params *p) : PioDevice(p),
40 IntDev(this, p->int_latency),
41 latency(p->pio_latency), pioAddr(p->pio_addr),
42 extIntPic(p->external_int_pic), lowestPriorityOffset(0)
43{
44 // This assumes there's only one I/O APIC in the system
44 // This assumes there's only one I/O APIC in the system and since the apic
45 // id is stored in a 8-bit field with 0xff meaning broadcast, the id must
46 // be less than 0xff
47
48 assert(p->apic_id < 0xff);
45 initialApicId = id = p->apic_id;
49 initialApicId = id = p->apic_id;
46 assert(id <= 0xf);
47 arbId = id;
48 regSel = 0;
49 RedirTableEntry entry = 0;
50 entry.mask = 1;
51 for (int i = 0; i < TableSize; i++) {
52 redirTable[i] = entry;
53 pinStates[i] = false;
54 }
55}
56
50 arbId = id;
51 regSel = 0;
52 RedirTableEntry entry = 0;
53 entry.mask = 1;
54 for (int i = 0; i < TableSize; i++) {
55 redirTable[i] = entry;
56 pinStates[i] = false;
57 }
58}
59
60void
61X86ISA::I82094AA::init()
62{
63 // The io apic must register its address ranges on both its pio port
64 // via the piodevice init() function and its int port that it inherited
65 // from IntDev. Note IntDev is not a SimObject itself.
66
67 PioDevice::init();
68 IntDev::init();
69}
70
57Tick
58X86ISA::I82094AA::read(PacketPtr pkt)
59{
60 assert(pkt->getSize() == 4);
61 Addr offset = pkt->getAddr() - pioAddr;
62 switch(offset) {
63 case 0:
64 pkt->set<uint32_t>(regSel);

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91 pkt->makeAtomicResponse();
92 return latency;
93}
94
95void
96X86ISA::I82094AA::writeReg(uint8_t offset, uint32_t value)
97{
98 if (offset == 0x0) {
71Tick
72X86ISA::I82094AA::read(PacketPtr pkt)
73{
74 assert(pkt->getSize() == 4);
75 Addr offset = pkt->getAddr() - pioAddr;
76 switch(offset) {
77 case 0:
78 pkt->set<uint32_t>(regSel);

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105 pkt->makeAtomicResponse();
106 return latency;
107}
108
109void
110X86ISA::I82094AA::writeReg(uint8_t offset, uint32_t value)
111{
112 if (offset == 0x0) {
99 id = bits(value, 27, 24);
113 id = bits(value, 31, 24);
100 } else if (offset == 0x1) {
101 // The IOAPICVER register is read only.
102 } else if (offset == 0x2) {
114 } else if (offset == 0x1) {
115 // The IOAPICVER register is read only.
116 } else if (offset == 0x2) {
103 arbId = bits(value, 27, 24);
117 arbId = bits(value, 31, 24);
104 } else if (offset >= 0x10 && offset <= (0x10 + TableSize * 2)) {
105 int index = (offset - 0x10) / 2;
106 if (offset % 2) {
107 redirTable[index].topDW = value;
108 redirTable[index].topReserved = 0;
109 } else {
110 redirTable[index].bottomDW = value;
111 redirTable[index].bottomReserved = 0;

--- 161 unchanged lines hidden --- 		118 } else if (offset >= 0x10 && offset <= (0x10 + TableSize * 2)) {
119 int index = (offset - 0x10) / 2;
120 if (offset % 2) {
121 redirTable[index].topDW = value;
122 redirTable[index].topReserved = 0;
123 } else {
124 redirTable[index].bottomDW = value;
125 redirTable[index].bottomReserved = 0;

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