i82094aa.cc (6137:d3ee4e0d690c) i82094aa.cc (6138:6cbdd76b93db)
1/*
2 * Copyright (c) 2008 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 */
30
1/*
2 * Copyright (c) 2008 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 14 unchanged lines hidden (view full) ---

23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 */
30
31#include "arch/x86/interrupts.hh"
31#include "arch/x86/intmessage.hh"
32#include "dev/x86/i82094aa.hh"
33#include "dev/x86/i8259.hh"
34#include "mem/packet.hh"
35#include "mem/packet_access.hh"
36#include "sim/system.hh"
37
38X86ISA::I82094AA::I82094AA(Params *p) : PioDevice(p), IntDev(this),

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157 message.vector = extIntPic->getVector();
158 } else {
159 message.vector = entry.vector;
160 }
161 message.deliveryMode = entry.deliveryMode;
162 message.destMode = entry.destMode;
163 message.level = entry.polarity;
164 message.trigger = entry.trigger;
32#include "arch/x86/intmessage.hh"
33#include "dev/x86/i82094aa.hh"
34#include "dev/x86/i8259.hh"
35#include "mem/packet.hh"
36#include "mem/packet_access.hh"
37#include "sim/system.hh"
38
39X86ISA::I82094AA::I82094AA(Params *p) : PioDevice(p), IntDev(this),

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158 message.vector = extIntPic->getVector();
159 } else {
160 message.vector = entry.vector;
161 }
162 message.deliveryMode = entry.deliveryMode;
163 message.destMode = entry.destMode;
164 message.level = entry.polarity;
165 message.trigger = entry.trigger;
165 intPort->sendMessage(message, sys->getMemoryMode() == Enums::timing);
166 ApicList apics;
167 int numContexts = sys->numContexts();
168 if (message.destMode == 0) {
169 if (message.deliveryMode == DeliveryMode::LowestPriority) {
170 panic("Lowest priority delivery mode from the "
171 "IO APIC aren't supported in physical "
172 "destination mode.\n");
173 }
174 if (message.destination == 0xFF) {
175 for (int i = 0; i < numContexts; i++) {
176 apics.push_back(i);
177 }
178 } else {
179 apics.push_back(message.destination);
180 }
181 } else {
182 for (int i = 0; i < numContexts; i++) {
183 std::map<int, Interrupts *>::iterator localApicIt =
184 localApics.find(i);
185 assert(localApicIt != localApics.end());
186 Interrupts *localApic = localApicIt->second;
187 if ((localApic->readReg(APIC_LOGICAL_DESTINATION) >> 24) &
188 message.destination) {
189 apics.push_back(localApicIt->first);
190 }
191 }
192 if (message.deliveryMode == DeliveryMode::LowestPriority) {
193 panic("Lowest priority delivery mode is not implemented.\n");
194 }
195 }
196 intPort->sendMessage(apics, message,
197 sys->getMemoryMode() == Enums::timing);
166 }
167}
168
169void
170X86ISA::I82094AA::raiseInterruptPin(int number)
171{
172 assert(number < TableSize);
173 if (!pinStates[number])

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199}
200
201void
202X86ISA::I82094AA::raiseInterruptPin(int number)
203{
204 assert(number < TableSize);
205 if (!pinStates[number])

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