i82094aa.cc (5827:ac2c268bf4f1) | i82094aa.cc (5898:541097c69e22) |
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1/* 2 * Copyright (c) 2008 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 53 unchanged lines hidden (view full) --- 62 pkt->set<uint32_t>(regSel); 63 break; 64 case 16: 65 pkt->set<uint32_t>(readReg(regSel)); 66 break; 67 default: 68 panic("Illegal read from I/O APIC.\n"); 69 } | 1/* 2 * Copyright (c) 2008 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 53 unchanged lines hidden (view full) --- 62 pkt->set<uint32_t>(regSel); 63 break; 64 case 16: 65 pkt->set<uint32_t>(readReg(regSel)); 66 break; 67 default: 68 panic("Illegal read from I/O APIC.\n"); 69 } |
70 pkt->makeAtomicResponse(); |
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70 return latency; 71} 72 73Tick 74X86ISA::I82094AA::write(PacketPtr pkt) 75{ 76 assert(pkt->getSize() == 4); 77 Addr offset = pkt->getAddr() - pioAddr; 78 switch(offset) { 79 case 0: 80 regSel = pkt->get<uint32_t>(); 81 break; 82 case 16: 83 writeReg(regSel, pkt->get<uint32_t>()); 84 break; 85 default: 86 panic("Illegal write to I/O APIC.\n"); 87 } | 71 return latency; 72} 73 74Tick 75X86ISA::I82094AA::write(PacketPtr pkt) 76{ 77 assert(pkt->getSize() == 4); 78 Addr offset = pkt->getAddr() - pioAddr; 79 switch(offset) { 80 case 0: 81 regSel = pkt->get<uint32_t>(); 82 break; 83 case 16: 84 writeReg(regSel, pkt->get<uint32_t>()); 85 break; 86 default: 87 panic("Illegal write to I/O APIC.\n"); 88 } |
89 pkt->makeAtomicResponse(); |
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88 return latency; 89} 90 91void 92X86ISA::I82094AA::writeReg(uint8_t offset, uint32_t value) 93{ 94 if (offset == 0x0) { 95 id = bits(value, 27, 24); --- 139 unchanged lines hidden --- | 90 return latency; 91} 92 93void 94X86ISA::I82094AA::writeReg(uint8_t offset, uint32_t value) 95{ 96 if (offset == 0x0) { 97 id = bits(value, 27, 24); --- 139 unchanged lines hidden --- |