i82094aa.cc (12749:223c83ed9979) i82094aa.cc (13229:b45254f2733a)
1/*
2 * Copyright (c) 2008 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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98
99Tick
100X86ISA::I82094AA::read(PacketPtr pkt)
101{
102 assert(pkt->getSize() == 4);
103 Addr offset = pkt->getAddr() - pioAddr;
104 switch(offset) {
105 case 0:
1/*
2 * Copyright (c) 2008 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 89 unchanged lines hidden (view full) ---

98
99Tick
100X86ISA::I82094AA::read(PacketPtr pkt)
101{
102 assert(pkt->getSize() == 4);
103 Addr offset = pkt->getAddr() - pioAddr;
104 switch(offset) {
105 case 0:
106 pkt->set(regSel);
106 pkt->setLE<uint32_t>(regSel);
107 break;
108 case 16:
107 break;
108 case 16:
109 pkt->set(readReg(regSel));
109 pkt->setLE<uint32_t>(readReg(regSel));
110 break;
111 default:
112 panic("Illegal read from I/O APIC.\n");
113 }
114 pkt->makeAtomicResponse();
115 return pioDelay;
116}
117
118Tick
119X86ISA::I82094AA::write(PacketPtr pkt)
120{
121 assert(pkt->getSize() == 4);
122 Addr offset = pkt->getAddr() - pioAddr;
123 switch(offset) {
124 case 0:
110 break;
111 default:
112 panic("Illegal read from I/O APIC.\n");
113 }
114 pkt->makeAtomicResponse();
115 return pioDelay;
116}
117
118Tick
119X86ISA::I82094AA::write(PacketPtr pkt)
120{
121 assert(pkt->getSize() == 4);
122 Addr offset = pkt->getAddr() - pioAddr;
123 switch(offset) {
124 case 0:
125 regSel = pkt->get();
125 regSel = pkt->getLE<uint32_t>();
126 break;
127 case 16:
126 break;
127 case 16:
128 writeReg(regSel, pkt->get());
128 writeReg(regSel, pkt->getLE<uint32_t>());
129 break;
130 default:
131 panic("Illegal write to I/O APIC.\n");
132 }
133 pkt->makeAtomicResponse();
134 return pioDelay;
135}
136

--- 168 unchanged lines hidden --- 		129 break;
130 default:
131 panic("Illegal write to I/O APIC.\n");
132 }
133 pkt->makeAtomicResponse();
134 return pioDelay;
135}
136

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