1/*
2 * Copyright (c) 2008 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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31#include "arch/x86/interrupts.hh"
32#include "arch/x86/intmessage.hh"
33#include "dev/x86/i82094aa.hh"
34#include "dev/x86/i8259.hh"
35#include "mem/packet.hh"
36#include "mem/packet_access.hh"
37#include "sim/system.hh"
38
39X86ISA::I82094AA::I82094AA(Params *p) : PioDevice(p), IntDev(this),
40 latency(p->pio_latency), pioAddr(p->pio_addr),
41 extIntPic(p->external_int_pic), lowestPriorityOffset(0)
42{
43 // This assumes there's only one I/O APIC in the system
44 initialApicId = id = p->apic_id;
45 assert(id <= 0xf);
46 arbId = id;
47 regSel = 0;

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