1/*
2 * Copyright (c) 2008 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 */
30
31#ifndef __DEV_X86_I8042_HH__
32#define __DEV_X86_I8042_HH__
33
34#include <deque>
35
36#include "dev/io_device.hh"
37#include "dev/ps2/device.hh"
38#include "dev/x86/intdev.hh"
39#include "params/I8042.hh"
40
41namespace X86ISA
42{
43
44class IntPin;
45
46class I8042 : public BasicPioDevice
47{
48 protected:
49 enum Command
50 {
51 GetCommandByte = 0x20,
52 ReadControllerRamBase = 0x20,
53 WriteCommandByte = 0x60,
54 WriteControllerRamBase = 0x60,
55 CheckForPassword = 0xA4,
56 LoadPassword = 0xA5,
57 CheckPassword = 0xA6,
58 DisableMouse = 0xA7,
59 EnableMouse = 0xA8,
60 TestMouse = 0xA9,
61 SelfTest = 0xAA,
62 InterfaceTest = 0xAB,
63 DiagnosticDump = 0xAC,
64 DisableKeyboard = 0xAD,
65 EnableKeyboard = 0xAE,
66 ReadInputPort = 0xC0,
67 ContinuousPollLow = 0xC1,
68 ContinuousPollHigh = 0xC2,
69 ReadOutputPort = 0xD0,
70 WriteOutputPort = 0xD1,
71 WriteKeyboardOutputBuff = 0xD2,
72 WriteMouseOutputBuff = 0xD3,
73 WriteToMouse = 0xD4,
74 DisableA20 = 0xDD,
75 EnableA20 = 0xDF,
76 ReadTestInputs = 0xE0,
77 PulseOutputBitBase = 0xF0,
78 SystemReset = 0xFE
79 };
80
81 BitUnion8(StatusReg)
82 Bitfield<7> parityError;
83 Bitfield<6> timeout;
84 Bitfield<5> mouseOutputFull;
85 Bitfield<4> keyboardUnlocked;
86 Bitfield<3> commandLast;
87 Bitfield<2> passedSelfTest;
88 Bitfield<1> inputFull;
89 Bitfield<0> outputFull;
90 EndBitUnion(StatusReg)
91
92 BitUnion8(CommandByte)
93 Bitfield<6> convertScanCodes;
94 Bitfield<5> disableMouse;
95 Bitfield<4> disableKeyboard;
96 Bitfield<2> passedSelfTest;
97 Bitfield<1> mouseFullInt;
98 Bitfield<0> keyboardFullInt;
99 EndBitUnion(CommandByte)
100
101 Tick latency;
102 Addr dataPort;
103 Addr commandPort;
104
105 StatusReg statusReg;
106 CommandByte commandByte;
107
108 uint8_t dataReg;
109
110 static const uint16_t NoCommand = (uint16_t)(-1);
111 uint16_t lastCommand;
112
113 IntSourcePin *mouseIntPin;
114 IntSourcePin *keyboardIntPin;
115
116 PS2Device *mouse;
117 PS2Device *keyboard;
118
119 void writeData(uint8_t newData, bool mouse = false);
120 uint8_t readDataOut();
121
122 public:
123 typedef I8042Params Params;
124
125 const Params *
126 params() const
127 {
128 return dynamic_cast<const Params *>(_params);
129 }
130
131 I8042(Params *p);
132
133 AddrRangeList getAddrRanges() const override;
134
135 Tick read(PacketPtr pkt) override;
136
137 Tick write(PacketPtr pkt) override;
138
139 void serialize(CheckpointOut &cp) const override;
140 void unserialize(CheckpointIn &cp) override;
141};
142
143} // namespace X86ISA
144
145#endif //__DEV_X86_I8042_HH__