cmos.cc (11793:ef606668d247) cmos.cc (13229:b45254f2733a)
1/*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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45
46Tick
47X86ISA::Cmos::read(PacketPtr pkt)
48{
49 assert(pkt->getSize() == 1);
50 switch(pkt->getAddr() - pioAddr)
51 {
52 case 0x0:
1/*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 36 unchanged lines hidden (view full) ---

45
46Tick
47X86ISA::Cmos::read(PacketPtr pkt)
48{
49 assert(pkt->getSize() == 1);
50 switch(pkt->getAddr() - pioAddr)
51 {
52 case 0x0:
53 pkt->set(address);
53 pkt->setLE(address);
54 break;
55 case 0x1:
54 break;
55 case 0x1:
56 pkt->set(readRegister(address));
56 pkt->setLE(readRegister(address));
57 break;
58 default:
59 panic("Read from undefined CMOS port.\n");
60 }
61 pkt->makeAtomicResponse();
62 return latency;
63}
64
65Tick
66X86ISA::Cmos::write(PacketPtr pkt)
67{
68 assert(pkt->getSize() == 1);
69 switch(pkt->getAddr() - pioAddr)
70 {
71 case 0x0:
57 break;
58 default:
59 panic("Read from undefined CMOS port.\n");
60 }
61 pkt->makeAtomicResponse();
62 return latency;
63}
64
65Tick
66X86ISA::Cmos::write(PacketPtr pkt)
67{
68 assert(pkt->getSize() == 1);
69 switch(pkt->getAddr() - pioAddr)
70 {
71 case 0x0:
72 address = pkt->get();
72 address = pkt->getLE<uint8_t>();
73 break;
74 case 0x1:
73 break;
74 case 0x1:
75 writeRegister(address, pkt->get());
75 writeRegister(address, pkt->getLE<uint8_t>());
76 break;
77 default:
78 panic("Write to undefined CMOS port.\n");
79 }
80 pkt->makeAtomicResponse();
81 return latency;
82}
83

--- 63 unchanged lines hidden --- 		76 break;
77 default:
78 panic("Write to undefined CMOS port.\n");
79 }
80 pkt->makeAtomicResponse();
81 return latency;
82}
83

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