1/*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 */
30
31#include "dev/x86/cmos.hh"
32
33#include "debug/CMOS.hh"
34#include "dev/x86/intdev.hh"
35#include "mem/packet_access.hh"
36
37void
38X86ISA::Cmos::X86RTC::handleEvent()
39{
40 assert(intPin);
41 intPin->raise();
42 //XXX This is a hack.
43 intPin->lower();
44}
45
46Tick
47X86ISA::Cmos::read(PacketPtr pkt)
48{
49 assert(pkt->getSize() == 1);
50 switch(pkt->getAddr() - pioAddr)
51 {
52 case 0x0:
| 1/*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 */
30
31#include "dev/x86/cmos.hh"
32
33#include "debug/CMOS.hh"
34#include "dev/x86/intdev.hh"
35#include "mem/packet_access.hh"
36
37void
38X86ISA::Cmos::X86RTC::handleEvent()
39{
40 assert(intPin);
41 intPin->raise();
42 //XXX This is a hack.
43 intPin->lower();
44}
45
46Tick
47X86ISA::Cmos::read(PacketPtr pkt)
48{
49 assert(pkt->getSize() == 1);
50 switch(pkt->getAddr() - pioAddr)
51 {
52 case 0x0:
|
53 pkt->set(address);
| 53 pkt->setLE(address);
|
54 break;
55 case 0x1:
| 54 break;
55 case 0x1:
|
56 pkt->set(readRegister(address));
| 56 pkt->setLE(readRegister(address));
|
57 break;
58 default:
59 panic("Read from undefined CMOS port.\n");
60 }
61 pkt->makeAtomicResponse();
62 return latency;
63}
64
65Tick
66X86ISA::Cmos::write(PacketPtr pkt)
67{
68 assert(pkt->getSize() == 1);
69 switch(pkt->getAddr() - pioAddr)
70 {
71 case 0x0:
| 57 break;
58 default:
59 panic("Read from undefined CMOS port.\n");
60 }
61 pkt->makeAtomicResponse();
62 return latency;
63}
64
65Tick
66X86ISA::Cmos::write(PacketPtr pkt)
67{
68 assert(pkt->getSize() == 1);
69 switch(pkt->getAddr() - pioAddr)
70 {
71 case 0x0:
|
72 address = pkt->get();
| 72 address = pkt->getLE<uint8_t>();
|
73 break;
74 case 0x1:
| 73 break;
74 case 0x1:
|
75 writeRegister(address, pkt->get());
| 75 writeRegister(address, pkt->getLE<uint8_t>());
|
76 break;
77 default:
78 panic("Write to undefined CMOS port.\n");
79 }
80 pkt->makeAtomicResponse();
81 return latency;
82}
83
84uint8_t
85X86ISA::Cmos::readRegister(uint8_t reg)
86{
87 assert(reg < numRegs);
88 uint8_t val;
89 if (reg <= 0xD) {
90 val = rtc.readData(reg);
91 DPRINTF(CMOS,
92 "Reading CMOS RTC reg %x as %x.\n", reg, val);
93 } else {
94 val = regs[reg];
95 DPRINTF(CMOS,
96 "Reading non-volitile CMOS address %x as %x.\n", reg, val);
97 }
98 return val;
99}
100
101void
102X86ISA::Cmos::writeRegister(uint8_t reg, uint8_t val)
103{
104 assert(reg < numRegs);
105 if (reg <= 0xD) {
106 DPRINTF(CMOS, "Writing CMOS RTC reg %x with %x.\n",
107 reg, val);
108 rtc.writeData(reg, val);
109 } else {
110 DPRINTF(CMOS, "Writing non-volitile CMOS address %x with %x.\n",
111 reg, val);
112 regs[reg] = val;
113 }
114}
115
116void
117X86ISA::Cmos::startup()
118{
119 rtc.startup();
120}
121
122void
123X86ISA::Cmos::serialize(CheckpointOut &cp) const
124{
125 SERIALIZE_SCALAR(address);
126 SERIALIZE_ARRAY(regs, numRegs);
127
128 // Serialize the timer
129 rtc.serialize("rtc", cp);
130}
131
132void
133X86ISA::Cmos::unserialize(CheckpointIn &cp)
134{
135 UNSERIALIZE_SCALAR(address);
136 UNSERIALIZE_ARRAY(regs, numRegs);
137
138 // Serialize the timer
139 rtc.unserialize("rtc", cp);
140}
141
142X86ISA::Cmos *
143CmosParams::create()
144{
145 return new X86ISA::Cmos(this);
146}
| 76 break;
77 default:
78 panic("Write to undefined CMOS port.\n");
79 }
80 pkt->makeAtomicResponse();
81 return latency;
82}
83
84uint8_t
85X86ISA::Cmos::readRegister(uint8_t reg)
86{
87 assert(reg < numRegs);
88 uint8_t val;
89 if (reg <= 0xD) {
90 val = rtc.readData(reg);
91 DPRINTF(CMOS,
92 "Reading CMOS RTC reg %x as %x.\n", reg, val);
93 } else {
94 val = regs[reg];
95 DPRINTF(CMOS,
96 "Reading non-volitile CMOS address %x as %x.\n", reg, val);
97 }
98 return val;
99}
100
101void
102X86ISA::Cmos::writeRegister(uint8_t reg, uint8_t val)
103{
104 assert(reg < numRegs);
105 if (reg <= 0xD) {
106 DPRINTF(CMOS, "Writing CMOS RTC reg %x with %x.\n",
107 reg, val);
108 rtc.writeData(reg, val);
109 } else {
110 DPRINTF(CMOS, "Writing non-volitile CMOS address %x with %x.\n",
111 reg, val);
112 regs[reg] = val;
113 }
114}
115
116void
117X86ISA::Cmos::startup()
118{
119 rtc.startup();
120}
121
122void
123X86ISA::Cmos::serialize(CheckpointOut &cp) const
124{
125 SERIALIZE_SCALAR(address);
126 SERIALIZE_ARRAY(regs, numRegs);
127
128 // Serialize the timer
129 rtc.serialize("rtc", cp);
130}
131
132void
133X86ISA::Cmos::unserialize(CheckpointIn &cp)
134{
135 UNSERIALIZE_SCALAR(address);
136 UNSERIALIZE_ARRAY(regs, numRegs);
137
138 // Serialize the timer
139 rtc.unserialize("rtc", cp);
140}
141
142X86ISA::Cmos *
143CmosParams::create()
144{
145 return new X86ISA::Cmos(this);
146}
|