SouthBridge.py (9338:97b4a2be1e5b) SouthBridge.py (10359:1e2f39859382)
1# Copyright (c) 2008 The Regents of The University of Michigan
2# All rights reserved.
3#
4# Redistribution and use in source and binary forms, with or without
5# modification, are permitted provided that the following conditions are
6# met: redistributions of source code must retain the above copyright
7# notice, this list of conditions and the following disclaimer;
8# redistributions in binary form must reproduce the above copyright

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79 ide.BAR3 = 0x374
80 ide.BAR3Size = '3B'
81 ide.BAR3LegacyIO = True
82 ide.BAR4 = 1
83 ide.Command = 0
84 ide.ProgIF = 0x80
85 ide.InterruptLine = 14
86 ide.InterruptPin = 1
1# Copyright (c) 2008 The Regents of The University of Michigan
2# All rights reserved.
3#
4# Redistribution and use in source and binary forms, with or without
5# modification, are permitted provided that the following conditions are
6# met: redistributions of source code must retain the above copyright
7# notice, this list of conditions and the following disclaimer;
8# redistributions in binary form must reproduce the above copyright

--- 70 unchanged lines hidden (view full) ---

79 ide.BAR3 = 0x374
80 ide.BAR3Size = '3B'
81 ide.BAR3LegacyIO = True
82 ide.BAR4 = 1
83 ide.Command = 0
84 ide.ProgIF = 0x80
85 ide.InterruptLine = 14
86 ide.InterruptPin = 1
87 ide.LegacyIOBase = x86IOAddress(0)
87
88 def attachIO(self, bus, dma_ports):
89 # Route interupt signals
90 self.int_lines = \
91 [X86IntLine(source=self.pic1.output, sink=self.io_apic.pin(0)),
92 X86IntLine(source=self.pic2.output, sink=self.pic1.pin(2)),
93 X86IntLine(source=self.cmos.int_pin, sink=self.pic2.pin(0)),
94 X86IntLine(source=self.pit.int_pin, sink=self.pic1.pin(0)),

--- 23 unchanged lines hidden --- 		88
89 def attachIO(self, bus, dma_ports):
90 # Route interupt signals
91 self.int_lines = \
92 [X86IntLine(source=self.pic1.output, sink=self.io_apic.pin(0)),
93 X86IntLine(source=self.pic2.output, sink=self.pic1.pin(2)),
94 X86IntLine(source=self.cmos.int_pin, sink=self.pic2.pin(0)),
95 X86IntLine(source=self.pit.int_pin, sink=self.pic1.pin(0)),

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