SouthBridge.py (8839:eeb293859255) | SouthBridge.py (8929:4148f9af0b70) |
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1# Copyright (c) 2008 The Regents of The University of Michigan 2# All rights reserved. 3# 4# Redistribution and use in source and binary forms, with or without 5# modification, are permitted provided that the following conditions are 6# met: redistributions of source code must retain the above copyright 7# notice, this list of conditions and the following disclaimer; 8# redistributions in binary form must reproduce the above copyright --- 71 unchanged lines hidden (view full) --- 80 ide.BAR3Size = '3B' 81 ide.BAR3LegacyIO = True 82 ide.BAR4 = 1 83 ide.Command = 0 84 ide.ProgIF = 0x80 85 ide.InterruptLine = 14 86 ide.InterruptPin = 1 87 | 1# Copyright (c) 2008 The Regents of The University of Michigan 2# All rights reserved. 3# 4# Redistribution and use in source and binary forms, with or without 5# modification, are permitted provided that the following conditions are 6# met: redistributions of source code must retain the above copyright 7# notice, this list of conditions and the following disclaimer; 8# redistributions in binary form must reproduce the above copyright --- 71 unchanged lines hidden (view full) --- 80 ide.BAR3Size = '3B' 81 ide.BAR3LegacyIO = True 82 ide.BAR4 = 1 83 ide.Command = 0 84 ide.ProgIF = 0x80 85 ide.InterruptLine = 14 86 ide.InterruptPin = 1 87 |
88 def attachIO(self, bus): | 88 def attachIO(self, bus, dma_ports): |
89 # Route interupt signals 90 self.int_lines = \ 91 [X86IntLine(source=self.pic1.output, sink=self.io_apic.pin(0)), 92 X86IntLine(source=self.pic2.output, sink=self.pic1.pin(2)), 93 X86IntLine(source=self.cmos.int_pin, sink=self.pic2.pin(0)), 94 X86IntLine(source=self.pit.int_pin, sink=self.pic1.pin(0)), 95 X86IntLine(source=self.pit.int_pin, sink=self.io_apic.pin(2)), 96 X86IntLine(source=self.keyboard.keyboard_int_pin, --- 4 unchanged lines hidden (view full) --- 101 self.pic1.slave = self.pic2 102 self.speaker.i8254 = self.pit 103 self.io_apic.external_int_pic = self.pic1 104 # Connect to the bus 105 self.cmos.pio = bus.master 106 self.dma1.pio = bus.master 107 self.ide.pio = bus.master 108 self.ide.config = bus.master | 89 # Route interupt signals 90 self.int_lines = \ 91 [X86IntLine(source=self.pic1.output, sink=self.io_apic.pin(0)), 92 X86IntLine(source=self.pic2.output, sink=self.pic1.pin(2)), 93 X86IntLine(source=self.cmos.int_pin, sink=self.pic2.pin(0)), 94 X86IntLine(source=self.pit.int_pin, sink=self.pic1.pin(0)), 95 X86IntLine(source=self.pit.int_pin, sink=self.io_apic.pin(2)), 96 X86IntLine(source=self.keyboard.keyboard_int_pin, --- 4 unchanged lines hidden (view full) --- 101 self.pic1.slave = self.pic2 102 self.speaker.i8254 = self.pit 103 self.io_apic.external_int_pic = self.pic1 104 # Connect to the bus 105 self.cmos.pio = bus.master 106 self.dma1.pio = bus.master 107 self.ide.pio = bus.master 108 self.ide.config = bus.master |
109 self.ide.dma = bus.slave | 109 if dma_ports.count(self.ide.dma) == 0: 110 self.ide.dma = bus.slave |
110 self.keyboard.pio = bus.master 111 self.pic1.pio = bus.master 112 self.pic2.pio = bus.master 113 self.pit.pio = bus.master 114 self.speaker.pio = bus.master 115 self.io_apic.pio = bus.master 116 self.io_apic.int_master = bus.slave | 111 self.keyboard.pio = bus.master 112 self.pic1.pio = bus.master 113 self.pic2.pio = bus.master 114 self.pit.pio = bus.master 115 self.speaker.pio = bus.master 116 self.io_apic.pio = bus.master 117 self.io_apic.int_master = bus.slave |