t1000.hh (5034:6186ef720dd4) t1000.hh (5834:b9e30a60dee4)
1/*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Ali Saidi
29 */
30
31/**
32 * @file
33 * Declaration of top level class for the T1000 platform chips. This class just
34 * retains pointers to all its children so the children can communicate.
35 */
36
37#ifndef __DEV_T1000_HH__
38#define __DEV_T1000_HH__
39
40#include "dev/platform.hh"
41#include "params/T1000.hh"
42
43class IdeController;
44class System;
45
46class T1000 : public Platform
47{
48 public:
49 /** Pointer to the system */
50 System *system;
51
52 public:
53 typedef T1000Params Params;
54 /**
55 * Constructor for the Tsunami Class.
56 * @param name name of the object
57 * @param s system the object belongs to
58 * @param intctrl pointer to the interrupt controller
59 */
60 T1000(const Params *p);
61
62 /**
63 * Return the interrupting frequency to AlphaAccess
64 * @return frequency of RTC interrupts
65 */
66 virtual Tick intrFrequency();
67
68 /**
69 * Cause the cpu to post a serial interrupt to the CPU.
70 */
71 virtual void postConsoleInt();
72
73 /**
74 * Clear a posted CPU interrupt
75 */
76 virtual void clearConsoleInt();
77
78 /**
79 * Cause the chipset to post a cpi interrupt to the CPU.
80 */
81 virtual void postPciInt(int line);
82
83 /**
84 * Clear a posted PCI->CPU interrupt
85 */
86 virtual void clearPciInt(int line);
87
88
89 virtual Addr pciToDma(Addr pciAddr) const;
90
91 /**
92 * Calculate the configuration address given a bus/dev/func.
93 */
1/*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Ali Saidi
29 */
30
31/**
32 * @file
33 * Declaration of top level class for the T1000 platform chips. This class just
34 * retains pointers to all its children so the children can communicate.
35 */
36
37#ifndef __DEV_T1000_HH__
38#define __DEV_T1000_HH__
39
40#include "dev/platform.hh"
41#include "params/T1000.hh"
42
43class IdeController;
44class System;
45
46class T1000 : public Platform
47{
48 public:
49 /** Pointer to the system */
50 System *system;
51
52 public:
53 typedef T1000Params Params;
54 /**
55 * Constructor for the Tsunami Class.
56 * @param name name of the object
57 * @param s system the object belongs to
58 * @param intctrl pointer to the interrupt controller
59 */
60 T1000(const Params *p);
61
62 /**
63 * Return the interrupting frequency to AlphaAccess
64 * @return frequency of RTC interrupts
65 */
66 virtual Tick intrFrequency();
67
68 /**
69 * Cause the cpu to post a serial interrupt to the CPU.
70 */
71 virtual void postConsoleInt();
72
73 /**
74 * Clear a posted CPU interrupt
75 */
76 virtual void clearConsoleInt();
77
78 /**
79 * Cause the chipset to post a cpi interrupt to the CPU.
80 */
81 virtual void postPciInt(int line);
82
83 /**
84 * Clear a posted PCI->CPU interrupt
85 */
86 virtual void clearPciInt(int line);
87
88
89 virtual Addr pciToDma(Addr pciAddr) const;
90
91 /**
92 * Calculate the configuration address given a bus/dev/func.
93 */
94 virtual Addr calcConfigAddr(int bus, int dev, int func);
94 virtual Addr calcPciConfigAddr(int bus, int dev, int func);
95
96 /**
97 * Calculate the address for an IO location on the PCI bus.
98 */
99 virtual Addr calcPciIOAddr(Addr addr);
100
101 /**
102 * Calculate the address for a memory location on the PCI bus.
103 */
104 virtual Addr calcPciMemAddr(Addr addr);
95};
96
97#endif // __DEV_T1000_HH__
105};
106
107#endif // __DEV_T1000_HH__