iob.hh (9090:e4e22240398f) iob.hh (9235:5aa4896ed55a)
1/*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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31/** @file
32 * This device implements the niagara I/O Bridge chip. The device manages
33 * internal (ipi) and external (serial, pci via jbus).
34 */
35
36#ifndef __DEV_SPARC_IOB_HH__
37#define __DEV_SPARC_IOB_HH__
38
1/*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 22 unchanged lines hidden (view full) ---

31/** @file
32 * This device implements the niagara I/O Bridge chip. The device manages
33 * internal (ipi) and external (serial, pci via jbus).
34 */
35
36#ifndef __DEV_SPARC_IOB_HH__
37#define __DEV_SPARC_IOB_HH__
38
39#include "base/range.hh"
40#include "dev/disk_image.hh"
41#include "dev/io_device.hh"
42#include "params/Iob.hh"
43
44class IntrControl;
45
46const int MaxNiagaraProcs = 32;
47// IOB Managment Addresses

--- 105 unchanged lines hidden --- 		39#include "dev/disk_image.hh"
40#include "dev/io_device.hh"
41#include "params/Iob.hh"
42
43class IntrControl;
44
45const int MaxNiagaraProcs = 32;
46// IOB Managment Addresses

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