iob.cc (6712:b95abe00dd9d) | iob.cc (7723:ee4ac00d0774) |
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1/* 2 * Copyright (c) 2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 25 unchanged lines hidden (view full) --- 34 * various status registers for CPUs to check what interrupts are pending as 35 * well as facilities to send IPIs to other cpus. 36 */ 37 38#include <cstring> 39 40#include "arch/sparc/isa_traits.hh" 41#include "arch/sparc/faults.hh" | 1/* 2 * Copyright (c) 2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 25 unchanged lines hidden (view full) --- 34 * various status registers for CPUs to check what interrupts are pending as 35 * well as facilities to send IPIs to other cpus. 36 */ 37 38#include <cstring> 39 40#include "arch/sparc/isa_traits.hh" 41#include "arch/sparc/faults.hh" |
42#include "base/bitfield.hh" |
|
42#include "base/trace.hh" 43#include "cpu/intr_control.hh" 44#include "dev/sparc/iob.hh" 45#include "dev/platform.hh" 46#include "mem/port.hh" 47#include "mem/packet_access.hh" 48#include "sim/faults.hh" 49#include "sim/system.hh" --- 329 unchanged lines hidden --- | 43#include "base/trace.hh" 44#include "cpu/intr_control.hh" 45#include "dev/sparc/iob.hh" 46#include "dev/platform.hh" 47#include "mem/port.hh" 48#include "mem/packet_access.hh" 49#include "sim/faults.hh" 50#include "sim/system.hh" --- 329 unchanged lines hidden --- |