1/*
2 * Copyright (c) 2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Ali Saidi
29 * Miguel Serrano
30 * Nathan Binkert
31 */
32
33static const int RTC_SEC = 0x00;
34static const int RTC_SEC_ALRM = 0x01;
35static const int RTC_MIN = 0x02;
36static const int RTC_MIN_ALRM = 0x03;
37static const int RTC_HR = 0x04;
38static const int RTC_HR_ALRM = 0x05;
39static const int RTC_DOW = 0x06;
40static const int RTC_DOM = 0x07;
41static const int RTC_MON = 0x08;
42static const int RTC_YEAR = 0x09;
43
44static const int RTC_STAT_REGA = 0x0A;
45static const int RTCA_1024HZ = 0x06; /* 1024Hz periodic interrupt frequency */
46static const int RTCA_32768HZ = 0x20; /* 22-stage divider, 32.768KHz timebase */
47static const int RTCA_UIP = 0x80; /* 1 = date and time update in progress */
48
49static const int RTC_STAT_REGB = 0x0B;
50static const int RTCB_DST = 0x01; /* USA Daylight Savings Time enable */
51static const int RTCB_24HR = 0x02; /* 0 = 12 hours, 1 = 24 hours */
52static const int RTCB_BIN = 0x04; /* 0 = BCD, 1 = Binary coded time */
53static const int RTCB_SQWE = 0x08; /* 1 = output sqare wave at SQW pin */
54static const int RTCB_UPDT_IE = 0x10; /* 1 = enable update-ended interrupt */
55static const int RTCB_ALRM_IE = 0x20; /* 1 = enable alarm interrupt */
56static const int RTCB_PRDC_IE = 0x40; /* 1 = enable periodic clock interrupt */
57static const int RTCB_NO_UPDT = 0x80; /* stop clock updates */
58
59static const int RTC_STAT_REGC = 0x0C;
60static const int RTC_STAT_REGD = 0x0D;
61