sinic.cc (12087:0e082672ac6b) sinic.cc (13342:1ddb43f47325)
1/*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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243 "cpu=%d vnic=%d da=%#x pa=%#x size=%d",
244 info.name, cpu, index, daddr, pkt->getAddr(), pkt->getSize());
245
246 prepareRead(cpu, index);
247
248 uint64_t value M5_VAR_USED = 0;
249 if (pkt->getSize() == 4) {
250 uint32_t reg = regData32(raddr);
1/*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 234 unchanged lines hidden (view full) ---

243 "cpu=%d vnic=%d da=%#x pa=%#x size=%d",
244 info.name, cpu, index, daddr, pkt->getAddr(), pkt->getSize());
245
246 prepareRead(cpu, index);
247
248 uint64_t value M5_VAR_USED = 0;
249 if (pkt->getSize() == 4) {
250 uint32_t reg = regData32(raddr);
251 pkt->set(reg);
251 pkt->setLE(reg);
252 value = reg;
253 }
254
255 if (pkt->getSize() == 8) {
256 uint64_t reg = regData64(raddr);
252 value = reg;
253 }
254
255 if (pkt->getSize() == 8) {
256 uint64_t reg = regData64(raddr);
257 pkt->set(reg);
257 pkt->setLE(reg);
258 value = reg;
259 }
260
261 DPRINTF(EthernetPIO,
262 "read %s: cpu=%d vnic=%d da=%#x pa=%#x size=%d val=%#x\n",
263 info.name, cpu, index, daddr, pkt->getAddr(), pkt->getSize(), value);
264
265 // reading the interrupt status register has the side effect of

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328 panic("write %s (invalid size): "
329 "cpu=%d vnic=%d da=%#x pa=%#x size=%d",
330 info.name, cpu, index, daddr, pkt->getAddr(), pkt->getSize());
331
332 VirtualReg &vnic = virtualRegs[index];
333
334 DPRINTF(EthernetPIO,
335 "write %s vnic %d: cpu=%d val=%#x da=%#x pa=%#x size=%d\n",
258 value = reg;
259 }
260
261 DPRINTF(EthernetPIO,
262 "read %s: cpu=%d vnic=%d da=%#x pa=%#x size=%d val=%#x\n",
263 info.name, cpu, index, daddr, pkt->getAddr(), pkt->getSize(), value);
264
265 // reading the interrupt status register has the side effect of

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328 panic("write %s (invalid size): "
329 "cpu=%d vnic=%d da=%#x pa=%#x size=%d",
330 info.name, cpu, index, daddr, pkt->getAddr(), pkt->getSize());
331
332 VirtualReg &vnic = virtualRegs[index];
333
334 DPRINTF(EthernetPIO,
335 "write %s vnic %d: cpu=%d val=%#x da=%#x pa=%#x size=%d\n",
336 info.name, index, cpu, info.size == 4 ? pkt->get<uint32_t>() :
337 pkt->get<uint64_t>(), daddr, pkt->getAddr(), pkt->getSize());
336 info.name, index, cpu, info.size == 4 ?
337 pkt->getLE<uint32_t>() : pkt->getLE<uint64_t>(),
338 daddr, pkt->getAddr(), pkt->getSize());
338
339 prepareWrite(cpu, index);
340
341 switch (raddr) {
342 case Regs::Config:
339
340 prepareWrite(cpu, index);
341
342 switch (raddr) {
343 case Regs::Config:
343 changeConfig(pkt->get());
344 changeConfig(pkt->getLE<uint32_t>());
344 break;
345
346 case Regs::Command:
345 break;
346
347 case Regs::Command:
347 command(pkt->get());
348 command(pkt->getLE<uint32_t>());
348 break;
349
350 case Regs::IntrStatus:
349 break;
350
351 case Regs::IntrStatus:
351 devIntrClear(regs.IntrStatus & pkt->get<uint32_t>());
352 devIntrClear(regs.IntrStatus &
353 pkt->getLE<uint32_t>());
352 break;
353
354 case Regs::IntrMask:
354 break;
355
356 case Regs::IntrMask:
355 devIntrChangeMask(pkt->get());
357 devIntrChangeMask(pkt->getLE<uint32_t>());
356 break;
357
358 case Regs::RxData:
359 if (Regs::get_RxDone_Busy(vnic.RxDone))
360 panic("receive machine busy with another request! rxState=%s",
361 RxStateStrings[rxState]);
362
363 vnic.rxUnique = rxUnique++;
364 vnic.RxDone = Regs::RxDone_Busy;
358 break;
359
360 case Regs::RxData:
361 if (Regs::get_RxDone_Busy(vnic.RxDone))
362 panic("receive machine busy with another request! rxState=%s",
363 RxStateStrings[rxState]);
364
365 vnic.rxUnique = rxUnique++;
366 vnic.RxDone = Regs::RxDone_Busy;
365 vnic.RxData = pkt->get();
367 vnic.RxData = pkt->getLE<uint64_t>();
366 rxBusyCount++;
367
368 rxBusyCount++;
369
368 if (Regs::get_RxData_Vaddr(pkt->get())) {
370 if (Regs::get_RxData_Vaddr(pkt->getLE<uint64_t>())) {
369 panic("vtophys not implemented in newmem");
370#ifdef SINIC_VTOPHYS
371 Addr vaddr = Regs::get_RxData_Addr(reg64);
372 Addr paddr = vtophys(req->xc, vaddr);
373 DPRINTF(EthernetPIO, "write RxData vnic %d (rxunique %d): "
374 "vaddr=%#x, paddr=%#x\n",
375 index, vnic.rxUnique, vaddr, paddr);
376

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398 case Regs::TxData:
399 if (Regs::get_TxDone_Busy(vnic.TxDone))
400 panic("transmit machine busy with another request! txState=%s",
401 TxStateStrings[txState]);
402
403 vnic.txUnique = txUnique++;
404 vnic.TxDone = Regs::TxDone_Busy;
405
371 panic("vtophys not implemented in newmem");
372#ifdef SINIC_VTOPHYS
373 Addr vaddr = Regs::get_RxData_Addr(reg64);
374 Addr paddr = vtophys(req->xc, vaddr);
375 DPRINTF(EthernetPIO, "write RxData vnic %d (rxunique %d): "
376 "vaddr=%#x, paddr=%#x\n",
377 index, vnic.rxUnique, vaddr, paddr);
378

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400 case Regs::TxData:
401 if (Regs::get_TxDone_Busy(vnic.TxDone))
402 panic("transmit machine busy with another request! txState=%s",
403 TxStateStrings[txState]);
404
405 vnic.txUnique = txUnique++;
406 vnic.TxDone = Regs::TxDone_Busy;
407
406 if (Regs::get_TxData_Vaddr(pkt->get())) {
408 if (Regs::get_TxData_Vaddr(pkt->getLE<uint64_t>())) {
407 panic("vtophys won't work here in newmem.\n");
408#ifdef SINIC_VTOPHYS
409 Addr vaddr = Regs::get_TxData_Addr(reg64);
410 Addr paddr = vtophys(req->xc, vaddr);
411 DPRINTF(EthernetPIO, "write TxData vnic %d (txunique %d): "
412 "vaddr=%#x, paddr=%#x\n",
413 index, vnic.txUnique, vaddr, paddr);
414

--- 1154 unchanged lines hidden --- 		409 panic("vtophys won't work here in newmem.\n");
410#ifdef SINIC_VTOPHYS
411 Addr vaddr = Regs::get_TxData_Addr(reg64);
412 Addr paddr = vtophys(req->xc, vaddr);
413 DPRINTF(EthernetPIO, "write TxData vnic %d (txunique %d): "
414 "vaddr=%#x, paddr=%#x\n",
415 index, vnic.txUnique, vaddr, paddr);
416

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