malta_io.hh (6379:75d4aaf7dd54) malta_io.hh (9235:5aa4896ed55a)
1/*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Ali Saidi
29 * Andrew Schultz
30 * Miguel Serrano
31 */
32
33/** @file
34 * Malta I/O Space mapping including RTC/timer interrupts
35 */
36
37#ifndef __DEV_MALTA_IO_HH__
38#define __DEV_MALTA_IO_HH__
39
1/*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Ali Saidi
29 * Andrew Schultz
30 * Miguel Serrano
31 */
32
33/** @file
34 * Malta I/O Space mapping including RTC/timer interrupts
35 */
36
37#ifndef __DEV_MALTA_IO_HH__
38#define __DEV_MALTA_IO_HH__
39
40#include "base/range.hh"
41#include "dev/mips/malta.hh"
42#include "dev/intel_8254_timer.hh"
43#include "dev/io_device.hh"
44#include "dev/mc146818.hh"
45#include "params/MaltaIO.hh"
46#include "sim/eventq.hh"
47
48/**
49 * Malta I/O device is a catch all for all the south bridge stuff we care
50 * to implement.
51 */
52class MaltaIO : public BasicPioDevice
53{
54 private:
55 struct tm tm;
56
57 protected:
58
59 class RTC : public MC146818
60 {
61 public:
62 Malta *malta;
63 RTC(const std::string &name, const MaltaIOParams *p);
64
65 protected:
66 void handleEvent()
67 {
68 //Actually interrupt the processor here
69 malta->cchip->postRTC();
70 }
71 };
72
73 /** Mask of the PIC1 */
74 uint8_t mask1;
75
76 /** Mask of the PIC2 */
77 uint8_t mask2;
78
79 /** Mode of PIC1. Not used for anything */
80 uint8_t mode1;
81
82 /** Mode of PIC2. Not used for anything */
83 uint8_t mode2;
84
85 /** Raw PIC interrupt register before masking */
86 uint8_t picr; //Raw PIC interrput register
87
88 /** Is the pic interrupting right now or not. */
89 bool picInterrupting;
90
91 /** A pointer to the Malta device which be belong to */
92 Malta *malta;
93
94 /** Intel 8253 Periodic Interval Timer */
95 Intel8254Timer pitimer;
96
97 RTC rtc;
98
99 /** The interval is set via two writes to the PIT.
100 * This variable contains a flag as to how many writes have happened, and
101 * the time so far.
102 */
103 uint16_t timerData;
104
105 public:
106 /**
107 * Return the freqency of the RTC
108 * @return interrupt rate of the RTC
109 */
110 Tick frequency() const;
111
112 typedef MaltaIOParams Params;
113
114 const Params *
115 params() const
116 {
117 return dynamic_cast<const Params *>(_params);
118 }
119
120 /**
121 * Initialize all the data for devices supported by Malta I/O.
122 * @param p pointer to Params struct
123 */
124 MaltaIO(const Params *p);
125
126 virtual Tick read(PacketPtr pkt);
127 virtual Tick write(PacketPtr pkt);
128
129
130 /** Post an Interrupt to the CPU */
131 void postIntr(uint8_t interrupt);
132
133 /** Clear an Interrupt to the CPU */
134 void clearIntr(uint8_t interrupt);
135
136 /**
137 * Serialize this object to the given output stream.
138 * @param os The stream to serialize to.
139 */
140 virtual void serialize(std::ostream &os);
141
142 /**
143 * Reconstruct the state of this object from a checkpoint.
144 * @param cp The checkpoint use.
145 * @param section The section name of this object
146 */
147 virtual void unserialize(Checkpoint *cp, const std::string &section);
148
149};
150
151#endif // __DEV_MALTA_IO_HH__
40#include "dev/mips/malta.hh"
41#include "dev/intel_8254_timer.hh"
42#include "dev/io_device.hh"
43#include "dev/mc146818.hh"
44#include "params/MaltaIO.hh"
45#include "sim/eventq.hh"
46
47/**
48 * Malta I/O device is a catch all for all the south bridge stuff we care
49 * to implement.
50 */
51class MaltaIO : public BasicPioDevice
52{
53 private:
54 struct tm tm;
55
56 protected:
57
58 class RTC : public MC146818
59 {
60 public:
61 Malta *malta;
62 RTC(const std::string &name, const MaltaIOParams *p);
63
64 protected:
65 void handleEvent()
66 {
67 //Actually interrupt the processor here
68 malta->cchip->postRTC();
69 }
70 };
71
72 /** Mask of the PIC1 */
73 uint8_t mask1;
74
75 /** Mask of the PIC2 */
76 uint8_t mask2;
77
78 /** Mode of PIC1. Not used for anything */
79 uint8_t mode1;
80
81 /** Mode of PIC2. Not used for anything */
82 uint8_t mode2;
83
84 /** Raw PIC interrupt register before masking */
85 uint8_t picr; //Raw PIC interrput register
86
87 /** Is the pic interrupting right now or not. */
88 bool picInterrupting;
89
90 /** A pointer to the Malta device which be belong to */
91 Malta *malta;
92
93 /** Intel 8253 Periodic Interval Timer */
94 Intel8254Timer pitimer;
95
96 RTC rtc;
97
98 /** The interval is set via two writes to the PIT.
99 * This variable contains a flag as to how many writes have happened, and
100 * the time so far.
101 */
102 uint16_t timerData;
103
104 public:
105 /**
106 * Return the freqency of the RTC
107 * @return interrupt rate of the RTC
108 */
109 Tick frequency() const;
110
111 typedef MaltaIOParams Params;
112
113 const Params *
114 params() const
115 {
116 return dynamic_cast<const Params *>(_params);
117 }
118
119 /**
120 * Initialize all the data for devices supported by Malta I/O.
121 * @param p pointer to Params struct
122 */
123 MaltaIO(const Params *p);
124
125 virtual Tick read(PacketPtr pkt);
126 virtual Tick write(PacketPtr pkt);
127
128
129 /** Post an Interrupt to the CPU */
130 void postIntr(uint8_t interrupt);
131
132 /** Clear an Interrupt to the CPU */
133 void clearIntr(uint8_t interrupt);
134
135 /**
136 * Serialize this object to the given output stream.
137 * @param os The stream to serialize to.
138 */
139 virtual void serialize(std::ostream &os);
140
141 /**
142 * Reconstruct the state of this object from a checkpoint.
143 * @param cp The checkpoint use.
144 * @param section The section name of this object
145 */
146 virtual void unserialize(Checkpoint *cp, const std::string &section);
147
148};
149
150#endif // __DEV_MALTA_IO_HH__