malta.hh (11168:f98eb2da15a4) malta.hh (11233:18e411ee6c04)
1/*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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38#ifndef __DEV_MALTA_HH__
39#define __DEV_MALTA_HH__
40
41#include "dev/platform.hh"
42#include "params/Malta.hh"
43
44class IdeController;
45class MaltaCChip;
1/*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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38#ifndef __DEV_MALTA_HH__
39#define __DEV_MALTA_HH__
40
41#include "dev/platform.hh"
42#include "params/Malta.hh"
43
44class IdeController;
45class MaltaCChip;
46class MaltaPChip;
47class MaltaIO;
48class System;
49
50/**
51 * Top level class for Malta Chipset emulation.
52 * This structure just contains pointers to all the
53 * children so the children can commnicate to do the
54 * read work

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67 MaltaIO *io;
68
69 /** Pointer to the Malta CChip.
70 * The chip contains some configuration information and
71 * all the interrupt mask and status registers
72 */
73 MaltaCChip *cchip;
74
46class MaltaIO;
47class System;
48
49/**
50 * Top level class for Malta Chipset emulation.
51 * This structure just contains pointers to all the
52 * children so the children can commnicate to do the
53 * read work

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66 MaltaIO *io;
67
68 /** Pointer to the Malta CChip.
69 * The chip contains some configuration information and
70 * all the interrupt mask and status registers
71 */
72 MaltaCChip *cchip;
73
75 /** Pointer to the Malta PChip.
76 * The pchip is the interface to the PCI bus, in our case
77 * it does not have to do much.
78 */
79 MaltaPChip *pchip;
80
81 int intr_sum_type[Malta::Max_CPUs];
82 int ipi_pending[Malta::Max_CPUs];
83
84 public:
85 /**
86 * Constructor for the Malta Class.
87 * @param name name of the object
88 * @param s system the object belongs to

--- 54 unchanged lines hidden --- 		74 int intr_sum_type[Malta::Max_CPUs];
75 int ipi_pending[Malta::Max_CPUs];
76
77 public:
78 /**
79 * Constructor for the Malta Class.
80 * @param name name of the object
81 * @param s system the object belongs to

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