1# Copyright (c) 2007 The Regents of The University of Michigan 2# All rights reserved. 3# 4# Redistribution and use in source and binary forms, with or without 5# modification, are permitted provided that the following conditions are 6# met: redistributions of source code must retain the above copyright 7# notice, this list of conditions and the following disclaimer; 8# redistributions in binary form must reproduce the above copyright --- 23 unchanged lines hidden (view full) --- 32from BadDevice import BadDevice 33from Device import BasicPioDevice 34from Pci import PciConfigAll 35from Platform import Platform 36from Uart import Uart8250 37 38class MaltaCChip(BasicPioDevice): 39 type = 'MaltaCChip' |
40 cxx_header = "dev/mips/malta_cchip.hh" |
41 malta = Param.Malta(Parent.any, "Malta") 42 43class MaltaIO(BasicPioDevice): 44 type = 'MaltaIO' |
45 cxx_header = "dev/mips/malta_io.hh" |
46 time = Param.Time('01/01/2009', 47 "System time to use (0 for actual time, default is 1/1/06)") 48 year_is_bcd = Param.Bool(False, 49 "The RTC should interpret the year as a BCD value") 50 malta = Param.Malta(Parent.any, "Malta") 51 frequency = Param.Frequency('1024Hz', "frequency of interrupts") 52 53class MaltaPChip(BasicPioDevice): 54 type = 'MaltaPChip' |
55 cxx_header = "dev/mips/malta_pchip.hh" |
56 malta = Param.Malta(Parent.any, "Malta") 57 58class Malta(Platform): 59 type = 'Malta' |
60 cxx_header = "dev/mips/malta.hh" |
61 system = Param.System(Parent.any, "system") 62 cchip = MaltaCChip(pio_addr=0x801a0000000) 63 io = MaltaIO(pio_addr=0x801fc000000) 64 uart = Uart8250(pio_addr=0xBFD003F8) 65 66 # Attach I/O devices to specified bus object. Can't do this 67 # earlier, since the bus object itself is typically defined at the 68 # System level. 69 def attachIO(self, bus): 70 self.cchip.pio = bus.master 71 self.io.pio = bus.master 72 self.uart.pio = bus.master |