mc146818.cc (5949:04ed7a1d9904) mc146818.cc (6617:6d3645f68654)
1/*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Ali Saidi
29 * Andrew Schultz
30 * Miguel Serrano
31 */
32
33#include <sys/time.h>
34#include <time.h>
35
36#include <string>
37
38#include "base/bitfield.hh"
39#include "base/time.hh"
40#include "base/trace.hh"
41#include "dev/mc146818.hh"
42#include "dev/rtcreg.h"
43
44using namespace std;
45
46MC146818::MC146818(EventManager *em, const string &n, const struct tm time,
47 bool bcd, Tick frequency)
48 : EventManager(em), _name(n), event(this, frequency)
49{
50 memset(clock_data, 0, sizeof(clock_data));
51 stat_regA = RTCA_32768HZ | RTCA_1024HZ;
52 stat_regB = RTCB_PRDC_IE | RTCB_24HR;
53 if (!bcd)
54 stat_regB |= RTCB_BIN;
55
56 year = time.tm_year;
57
58 if (bcd) {
59 // The datasheet says that the year field can be either BCD or
60 // years since 1900. Linux seems to be happy with years since
61 // 1900.
62 year = year % 100;
63 int tens = year / 10;
64 int ones = year % 10;
65 year = (tens << 4) + ones;
66 }
67
68 // Unix is 0-11 for month, data seet says start at 1
69 mon = time.tm_mon + 1;
70 mday = time.tm_mday;
71 hour = time.tm_hour;
72 min = time.tm_min;
73 sec = time.tm_sec;
74
75 // Datasheet says 1 is sunday
76 wday = time.tm_wday + 1;
77
78 DPRINTFN("Real-time clock set to %s", asctime(&time));
79}
80
81MC146818::~MC146818()
82{
83}
84
85void
86MC146818::writeData(const uint8_t addr, const uint8_t data)
87{
88 if (addr < RTC_STAT_REGA)
89 clock_data[addr] = data;
90 else {
91 switch (addr) {
92 case RTC_STAT_REGA:
93 // The "update in progress" bit is read only.
94 if ((data & ~RTCA_UIP) != (RTCA_32768HZ | RTCA_1024HZ))
95 panic("Unimplemented RTC register A value write!\n");
96 replaceBits(stat_regA, data, 6, 0);
97 break;
98 case RTC_STAT_REGB:
1/*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Ali Saidi
29 * Andrew Schultz
30 * Miguel Serrano
31 */
32
33#include <sys/time.h>
34#include <time.h>
35
36#include <string>
37
38#include "base/bitfield.hh"
39#include "base/time.hh"
40#include "base/trace.hh"
41#include "dev/mc146818.hh"
42#include "dev/rtcreg.h"
43
44using namespace std;
45
46MC146818::MC146818(EventManager *em, const string &n, const struct tm time,
47 bool bcd, Tick frequency)
48 : EventManager(em), _name(n), event(this, frequency)
49{
50 memset(clock_data, 0, sizeof(clock_data));
51 stat_regA = RTCA_32768HZ | RTCA_1024HZ;
52 stat_regB = RTCB_PRDC_IE | RTCB_24HR;
53 if (!bcd)
54 stat_regB |= RTCB_BIN;
55
56 year = time.tm_year;
57
58 if (bcd) {
59 // The datasheet says that the year field can be either BCD or
60 // years since 1900. Linux seems to be happy with years since
61 // 1900.
62 year = year % 100;
63 int tens = year / 10;
64 int ones = year % 10;
65 year = (tens << 4) + ones;
66 }
67
68 // Unix is 0-11 for month, data seet says start at 1
69 mon = time.tm_mon + 1;
70 mday = time.tm_mday;
71 hour = time.tm_hour;
72 min = time.tm_min;
73 sec = time.tm_sec;
74
75 // Datasheet says 1 is sunday
76 wday = time.tm_wday + 1;
77
78 DPRINTFN("Real-time clock set to %s", asctime(&time));
79}
80
81MC146818::~MC146818()
82{
83}
84
85void
86MC146818::writeData(const uint8_t addr, const uint8_t data)
87{
88 if (addr < RTC_STAT_REGA)
89 clock_data[addr] = data;
90 else {
91 switch (addr) {
92 case RTC_STAT_REGA:
93 // The "update in progress" bit is read only.
94 if ((data & ~RTCA_UIP) != (RTCA_32768HZ | RTCA_1024HZ))
95 panic("Unimplemented RTC register A value write!\n");
96 replaceBits(stat_regA, data, 6, 0);
97 break;
98 case RTC_STAT_REGB:
99 if ((data & ~(RTCB_PRDC_IE | RTCB_SQWE)) != (RTCB_BIN | RTCB_24HR))
99 if ((data & ~(RTCB_PRDC_IE | RTCB_SQWE)) != RTCB_24HR)
100 panic("Write to RTC reg B bits that are not implemented!\n");
101
102 if (data & RTCB_PRDC_IE) {
103 if (!event.scheduled())
104 event.scheduleIntr();
105 } else {
106 if (event.scheduled())
107 deschedule(event);
108 }
109 stat_regB = data;
110 break;
111 case RTC_STAT_REGC:
112 case RTC_STAT_REGD:
113 panic("RTC status registers C and D are not implemented.\n");
114 break;
115 }
116 }
117}
118
119uint8_t
120MC146818::readData(uint8_t addr)
121{
122 if (addr < RTC_STAT_REGA)
123 return clock_data[addr];
124 else {
125 switch (addr) {
126 case RTC_STAT_REGA:
127 // toggle UIP bit for linux
128 stat_regA ^= RTCA_UIP;
129 return stat_regA;
130 break;
131 case RTC_STAT_REGB:
132 return stat_regB;
133 break;
134 case RTC_STAT_REGC:
135 case RTC_STAT_REGD:
136 return 0x00;
137 break;
138 default:
139 panic("Shouldn't be here");
140 }
141 }
142}
143
144void
145MC146818::serialize(const string &base, ostream &os)
146{
147 arrayParamOut(os, base + ".clock_data", clock_data, sizeof(clock_data));
148 paramOut(os, base + ".stat_regA", stat_regA);
149 paramOut(os, base + ".stat_regB", stat_regB);
150}
151
152void
153MC146818::unserialize(const string &base, Checkpoint *cp,
154 const string &section)
155{
156 arrayParamIn(cp, section, base + ".clock_data", clock_data,
157 sizeof(clock_data));
158 paramIn(cp, section, base + ".stat_regA", stat_regA);
159 paramIn(cp, section, base + ".stat_regB", stat_regB);
160
161 // We're not unserializing the event here, but we need to
162 // rescehedule the event since curTick was moved forward by the
163 // checkpoint
164 reschedule(event, curTick + event.interval);
165}
166
167MC146818::RTCEvent::RTCEvent(MC146818 * _parent, Tick i)
168 : parent(_parent), interval(i)
169{
170 DPRINTF(MC146818, "RTC Event Initilizing\n");
171 parent->schedule(this, curTick + interval);
172}
173
174void
175MC146818::RTCEvent::scheduleIntr()
176{
177 parent->schedule(this, curTick + interval);
178}
179
180void
181MC146818::RTCEvent::process()
182{
183 DPRINTF(MC146818, "RTC Timer Interrupt\n");
184 parent->schedule(this, curTick + interval);
185 parent->handleEvent();
186}
187
188const char *
189MC146818::RTCEvent::description() const
190{
191 return "RTC interrupt";
192}
100 panic("Write to RTC reg B bits that are not implemented!\n");
101
102 if (data & RTCB_PRDC_IE) {
103 if (!event.scheduled())
104 event.scheduleIntr();
105 } else {
106 if (event.scheduled())
107 deschedule(event);
108 }
109 stat_regB = data;
110 break;
111 case RTC_STAT_REGC:
112 case RTC_STAT_REGD:
113 panic("RTC status registers C and D are not implemented.\n");
114 break;
115 }
116 }
117}
118
119uint8_t
120MC146818::readData(uint8_t addr)
121{
122 if (addr < RTC_STAT_REGA)
123 return clock_data[addr];
124 else {
125 switch (addr) {
126 case RTC_STAT_REGA:
127 // toggle UIP bit for linux
128 stat_regA ^= RTCA_UIP;
129 return stat_regA;
130 break;
131 case RTC_STAT_REGB:
132 return stat_regB;
133 break;
134 case RTC_STAT_REGC:
135 case RTC_STAT_REGD:
136 return 0x00;
137 break;
138 default:
139 panic("Shouldn't be here");
140 }
141 }
142}
143
144void
145MC146818::serialize(const string &base, ostream &os)
146{
147 arrayParamOut(os, base + ".clock_data", clock_data, sizeof(clock_data));
148 paramOut(os, base + ".stat_regA", stat_regA);
149 paramOut(os, base + ".stat_regB", stat_regB);
150}
151
152void
153MC146818::unserialize(const string &base, Checkpoint *cp,
154 const string &section)
155{
156 arrayParamIn(cp, section, base + ".clock_data", clock_data,
157 sizeof(clock_data));
158 paramIn(cp, section, base + ".stat_regA", stat_regA);
159 paramIn(cp, section, base + ".stat_regB", stat_regB);
160
161 // We're not unserializing the event here, but we need to
162 // rescehedule the event since curTick was moved forward by the
163 // checkpoint
164 reschedule(event, curTick + event.interval);
165}
166
167MC146818::RTCEvent::RTCEvent(MC146818 * _parent, Tick i)
168 : parent(_parent), interval(i)
169{
170 DPRINTF(MC146818, "RTC Event Initilizing\n");
171 parent->schedule(this, curTick + interval);
172}
173
174void
175MC146818::RTCEvent::scheduleIntr()
176{
177 parent->schedule(this, curTick + interval);
178}
179
180void
181MC146818::RTCEvent::process()
182{
183 DPRINTF(MC146818, "RTC Timer Interrupt\n");
184 parent->schedule(this, curTick + interval);
185 parent->handleEvent();
186}
187
188const char *
189MC146818::RTCEvent::description() const
190{
191 return "RTC interrupt";
192}