isa_fake.hh (3488:52e909177bfa) isa_fake.hh (3499:597f3f6c9775)
1/*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
1/*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 11 unchanged lines hidden (view full) ---

20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Miguel Serrano
29 * Ali Saidi
28 * Authors: Ali Saidi
30 */
31
32/** @file
33 * Declaration of a fake device.
34 */
35
36#ifndef __ISA_FAKE_HH__
37#define __ISA_FAKE_HH__
38
39#include "base/range.hh"
40#include "dev/io_device.hh"
41#include "dev/tsunami.hh"
42#include "mem/packet.hh"
43
44/**
29 */
30
31/** @file
32 * Declaration of a fake device.
33 */
34
35#ifndef __ISA_FAKE_HH__
36#define __ISA_FAKE_HH__
37
38#include "base/range.hh"
39#include "dev/io_device.hh"
40#include "dev/tsunami.hh"
41#include "mem/packet.hh"
42
43/**
45 * IsaFake is a device that returns -1 on all reads and
46 * accepts all writes. It is meant to be placed at an address range
44 * IsaFake is a device that returns, BadAddr, 1 or 0 on all reads and
45 * rites. It is meant to be placed at an address range
47 * so that an mcheck doesn't occur when an os probes a piece of hw
46 * so that an mcheck doesn't occur when an os probes a piece of hw
48 * that doesn't exist (e.g. UARTs1-3).
47 * that doesn't exist (e.g. UARTs1-3), or catch requests in the memory system
48 * that have no responders..
49 */
50class IsaFake : public BasicPioDevice
51{
52 public:
53 struct Params : public BasicPioDevice::Params
54 {
55 Addr pio_size;
49 */
50class IsaFake : public BasicPioDevice
51{
52 public:
53 struct Params : public BasicPioDevice::Params
54 {
55 Addr pio_size;
56 bool retBadAddr;
57 uint8_t retData;
56 };
57 protected:
58 const Params *params() const { return (const Params*)_params; }
58 };
59 protected:
60 const Params *params() const { return (const Params*)_params; }
61 uint64_t retData;
59
60 public:
61 /**
62 * The constructor for Tsunmami Fake just registers itself with the MMU.
63 * @param p params structure
64 */
65 IsaFake(Params *p);
66

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72 virtual Tick read(PacketPtr pkt);
73
74 /**
75 * All writes are simply ignored.
76 * @param pkt The memory request.
77 * @param data the data to not write.
78 */
79 virtual Tick write(PacketPtr pkt);
62
63 public:
64 /**
65 * The constructor for Tsunmami Fake just registers itself with the MMU.
66 * @param p params structure
67 */
68 IsaFake(Params *p);
69

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75 virtual Tick read(PacketPtr pkt);
76
77 /**
78 * All writes are simply ignored.
79 * @param pkt The memory request.
80 * @param data the data to not write.
81 */
82 virtual Tick write(PacketPtr pkt);
80};
81
83
82/**
83 * BadAddr is a device that fills the packet's result field with "BadAddress".
84 * @todo: Consider consolidating with IsaFake and similar classes.
85 */
86class BadAddr : public BasicPioDevice
87{
88 public:
89 struct Params : public BasicPioDevice::Params
90 {
91 };
92
93 BadAddr(Params *p);
94 virtual void init();
95 virtual Tick read(PacketPtr pkt);
96 virtual Tick write(PacketPtr pkt);
84 void init();
97};
98
85};
86
99#endif // __TSUNAMI_FAKE_HH__
87#endif // __ISA_FAKE_HH__