92,93c92,97
< DmaReqState(Event *ce, Port *p, Addr tb)
< : completionEvent(ce), outPort(p), totBytes(tb), numBytes(0)
---
> /** Amount to delay completion of dma by */
> Tick delay;
>
> DmaReqState(Event *ce, Port *p, Addr tb, Tick _delay)
> : completionEvent(ce), outPort(p), totBytes(tb), numBytes(0),
> delay(_delay)
147c151
< uint8_t *data = NULL);
---
> uint8_t *data, Tick delay);
268c272
< void dmaWrite(Addr addr, int size, Event *event, uint8_t *data)
---
> void dmaWrite(Addr addr, int size, Event *event, uint8_t *data, Tick delay = 0)
270c274
< dmaPort->dmaAction(MemCmd::WriteReq, addr, size, event, data);
---
> dmaPort->dmaAction(MemCmd::WriteReq, addr, size, event, data, delay);
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< void dmaRead(Addr addr, int size, Event *event, uint8_t *data)
---
> void dmaRead(Addr addr, int size, Event *event, uint8_t *data, Tick delay = 0)
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< dmaPort->dmaAction(MemCmd::ReadReq, addr, size, event, data);
---
> dmaPort->dmaAction(MemCmd::ReadReq, addr, size, event, data, delay);