1/*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
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261 const Params *
262 params() const
263 {
264 return dynamic_cast<const Params *>(_params);
265 }
266
267 void dmaWrite(Addr addr, int size, Event *event, uint8_t *data)
268 {
269 dmaPort->dmaAction(MemCmd::WriteInvalidateReq,
270 addr, size, event, data);
271 }
272
273 void dmaRead(Addr addr, int size, Event *event, uint8_t *data)
274 {
275 dmaPort->dmaAction(MemCmd::ReadReq, addr, size, event, data);
276 }
277
278 bool dmaPending() { return dmaPort->dmaPending(); }
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2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
--- 252 unchanged lines hidden (view full) ---
261 const Params *
262 params() const
263 {
264 return dynamic_cast<const Params *>(_params);
265 }
266
267 void dmaWrite(Addr addr, int size, Event *event, uint8_t *data)
268 {
269 dmaPort->dmaAction(MemCmd::WriteInvalidateReq,
270 addr, size, event, data);
271 }
272
273 void dmaRead(Addr addr, int size, Event *event, uint8_t *data)
274 {
275 dmaPort->dmaAction(MemCmd::ReadReq, addr, size, event, data);
276 }
277
278 bool dmaPending() { return dmaPort->dmaPending(); }
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