io_device.cc (4918:3214e3694fb2) io_device.cc (5534:9eaf72819836)
1/*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 124 unchanged lines hidden (view full) ---

133 pendingCount--;
134
135 assert(pendingCount >= 0);
136 assert(state);
137
138 state->numBytes += pkt->req->getSize();
139 assert(state->totBytes >= state->numBytes);
140 if (state->totBytes == state->numBytes) {
1/*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 124 unchanged lines hidden (view full) ---

133 pendingCount--;
134
135 assert(pendingCount >= 0);
136 assert(state);
137
138 state->numBytes += pkt->req->getSize();
139 assert(state->totBytes >= state->numBytes);
140 if (state->totBytes == state->numBytes) {
141 state->completionEvent->process();
141 if (state->delay)
142 state->completionEvent->schedule(state->delay + curTick);
143 else
144 state->completionEvent->process();
142 delete state;
143 }
144 delete pkt->req;
145 delete pkt;
146
147 if (pendingCount == 0 && drainEvent) {
148 drainEvent->process();
149 drainEvent = NULL;

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211 DPRINTF(DMA, "TransmitList: %d, backoffTime: %d inRetry: %d es: %d\n",
212 transmitList.size(), backoffTime, inRetry,
213 backoffEvent.scheduled());
214}
215
216
217void
218DmaPort::dmaAction(Packet::Command cmd, Addr addr, int size, Event *event,
145 delete state;
146 }
147 delete pkt->req;
148 delete pkt;
149
150 if (pendingCount == 0 && drainEvent) {
151 drainEvent->process();
152 drainEvent = NULL;

--- 61 unchanged lines hidden (view full) ---

214 DPRINTF(DMA, "TransmitList: %d, backoffTime: %d inRetry: %d es: %d\n",
215 transmitList.size(), backoffTime, inRetry,
216 backoffEvent.scheduled());
217}
218
219
220void
221DmaPort::dmaAction(Packet::Command cmd, Addr addr, int size, Event *event,
219 uint8_t *data)
222 uint8_t *data, Tick delay)
220{
221 assert(event);
222
223 assert(device->getState() == SimObject::Running);
224
223{
224 assert(event);
225
226 assert(device->getState() == SimObject::Running);
227
225 DmaReqState *reqState = new DmaReqState(event, this, size);
228 DmaReqState *reqState = new DmaReqState(event, this, size, delay);
226
227
228 DPRINTF(DMA, "Starting DMA for addr: %#x size: %d sched: %d\n", addr, size,
229 event->scheduled());
230 for (ChunkGenerator gen(addr, size, peerBlockSize());
231 !gen.done(); gen.next()) {
232 Request *req = new Request(gen.addr(), gen.size(), 0);
233 PacketPtr pkt = new Packet(req, cmd, Packet::Broadcast);

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309 state->numBytes += pkt->req->getSize();
310
311 DPRINTF(DMA, "--Received response for DMA for addr: %#x size: %d nb: %d, tot: %d sched %d\n",
312 pkt->req->getPaddr(), pkt->req->getSize(), state->numBytes,
313 state->totBytes, state->completionEvent->scheduled());
314
315 if (state->totBytes == state->numBytes) {
316 assert(!state->completionEvent->scheduled());
229
230
231 DPRINTF(DMA, "Starting DMA for addr: %#x size: %d sched: %d\n", addr, size,
232 event->scheduled());
233 for (ChunkGenerator gen(addr, size, peerBlockSize());
234 !gen.done(); gen.next()) {
235 Request *req = new Request(gen.addr(), gen.size(), 0);
236 PacketPtr pkt = new Packet(req, cmd, Packet::Broadcast);

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312 state->numBytes += pkt->req->getSize();
313
314 DPRINTF(DMA, "--Received response for DMA for addr: %#x size: %d nb: %d, tot: %d sched %d\n",
315 pkt->req->getPaddr(), pkt->req->getSize(), state->numBytes,
316 state->totBytes, state->completionEvent->scheduled());
317
318 if (state->totBytes == state->numBytes) {
319 assert(!state->completionEvent->scheduled());
317 state->completionEvent->schedule(curTick + lat);
320 state->completionEvent->schedule(curTick + lat + state->delay);
318 delete state;
319 delete pkt->req;
320 }
321 pendingCount--;
322 assert(pendingCount >= 0);
323 delete pkt;
324
325 if (pendingCount == 0 && drainEvent) {

--- 13 unchanged lines hidden --- 		321 delete state;
322 delete pkt->req;
323 }
324 pendingCount--;
325 assert(pendingCount >= 0);
326 delete pkt;
327
328 if (pendingCount == 0 && drainEvent) {

--- 13 unchanged lines hidden ---