io_device.cc (2640:266b80dd5eca) | io_device.cc (2641:6d9d837e2032) |
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1/* 2 * Copyright (c) 2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 53 unchanged lines hidden (view full) --- 62 transmitList.pop_front(); 63 return pkt; 64} 65 66 67void 68PioPort::SendEvent::process() 69{ | 1/* 2 * Copyright (c) 2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 53 unchanged lines hidden (view full) --- 62 transmitList.pop_front(); 63 return pkt; 64} 65 66 67void 68PioPort::SendEvent::process() 69{ |
70 if (port->Port::sendTiming(packet) == Success) | 70 if (port->Port::sendTiming(packet)) |
71 return; 72 73 port->transmitList.push_back(packet); 74} 75 76 77bool 78PioPort::recvTiming(Packet *pkt) 79{ 80 device->recvAtomic(pkt); 81 // turn packet around to go back to requester | 71 return; 72 73 port->transmitList.push_back(packet); 74} 75 76 77bool 78PioPort::recvTiming(Packet *pkt) 79{ 80 device->recvAtomic(pkt); 81 // turn packet around to go back to requester |
82 pkt->dest = pkt->src; | 82 pkt->makeTimingResponse(); |
83 sendTiming(pkt, pkt->time - pkt->req->getTime()); | 83 sendTiming(pkt, pkt->time - pkt->req->getTime()); |
84 return Success; | 84 return true; |
85} 86 87PioDevice::~PioDevice() 88{ 89 if (pioPort) 90 delete pioPort; 91} 92 --- 18 unchanged lines hidden (view full) --- 111 : Port(dev->name() + "-dmaport"), device(dev), platform(p), pendingCount(0) 112{ } 113 114bool 115DmaPort::recvTiming(Packet *pkt) 116{ 117 if (pkt->senderState) { 118 DmaReqState *state; | 85} 86 87PioDevice::~PioDevice() 88{ 89 if (pioPort) 90 delete pioPort; 91} 92 --- 18 unchanged lines hidden (view full) --- 111 : Port(dev->name() + "-dmaport"), device(dev), platform(p), pendingCount(0) 112{ } 113 114bool 115DmaPort::recvTiming(Packet *pkt) 116{ 117 if (pkt->senderState) { 118 DmaReqState *state; |
119 state = (DmaReqState*)pkt->senderState; | 119 state = dynamic_cast<DmaReqState*>(pkt->senderState); |
120 state->completionEvent->schedule(pkt->time - pkt->req->getTime()); 121 delete pkt->req; 122 delete pkt; 123 } else { 124 delete pkt->req; 125 delete pkt; 126 } 127 | 120 state->completionEvent->schedule(pkt->time - pkt->req->getTime()); 121 delete pkt->req; 122 delete pkt; 123 } else { 124 delete pkt->req; 125 delete pkt; 126 } 127 |
128 return Success; | 128 return Packet::Success; |
129} 130 131DmaDevice::DmaDevice(Params *p) 132 : PioDevice(p), dmaPort(NULL) 133{ } 134 135void 136DmaPort::SendEvent::process() 137{ | 129} 130 131DmaDevice::DmaDevice(Params *p) 132 : PioDevice(p), dmaPort(NULL) 133{ } 134 135void 136DmaPort::SendEvent::process() 137{ |
138 if (port->Port::sendTiming(packet) == Success) | 138 if (port->Port::sendTiming(packet)) |
139 return; 140 141 port->transmitList.push_back(packet); 142} 143 144Packet * 145DmaPort::recvRetry() 146{ 147 Packet* pkt = transmitList.front(); 148 transmitList.pop_front(); 149 return pkt; 150} | 139 return; 140 141 port->transmitList.push_back(packet); 142} 143 144Packet * 145DmaPort::recvRetry() 146{ 147 Packet* pkt = transmitList.front(); 148 transmitList.pop_front(); 149 return pkt; 150} |
151 152 |
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151void | 153void |
152DmaPort::dmaAction(Command cmd, Addr addr, int size, Event *event, 153 uint8_t *data) | 154DmaPort::dmaAction(Packet::Command cmd, Addr addr, int size, Event *event, 155 uint8_t *data) |
154{ | 156{ |
155 | |
156 assert(event); 157 158 int prevSize = 0; | 157 assert(event); 158 159 int prevSize = 0; |
159 Packet basePkt; 160 Request baseReq(false); | |
161 | 160 |
162 basePkt.flags = 0; 163 basePkt.coherence = NULL; 164 basePkt.senderState = NULL; 165 basePkt.dest = Packet::Broadcast; 166 basePkt.cmd = cmd; 167 basePkt.result = Unknown; 168 basePkt.req = NULL; 169// baseReq.nicReq = true; 170 baseReq.setTime(curTick); 171 | |
172 for (ChunkGenerator gen(addr, size, peerBlockSize()); 173 !gen.done(); gen.next()) { | 161 for (ChunkGenerator gen(addr, size, peerBlockSize()); 162 !gen.done(); gen.next()) { |
174 Packet *pkt = new Packet(basePkt); 175 Request *req = new Request(baseReq); 176 pkt->addr = gen.addr(); 177 pkt->size = gen.size(); 178 pkt->req = req; 179 pkt->req->setPaddr(pkt->addr); 180 pkt->req->setSize(pkt->size); | 163 Request *req = new Request(false); 164 req->setPaddr(gen.addr()); 165 req->setSize(gen.size()); 166 req->setTime(curTick); 167 Packet *pkt = new Packet(req, cmd, Packet::Broadcast); 168 |
181 // Increment the data pointer on a write 182 if (data) 183 pkt->dataStatic(data + prevSize) ; | 169 // Increment the data pointer on a write 170 if (data) 171 pkt->dataStatic(data + prevSize) ; |
184 prevSize += pkt->size; | 172 173 prevSize += gen.size(); 174 |
185 // Set the last bit of the dma as the final packet for this dma 186 // and set it's completion event. 187 if (prevSize == size) { | 175 // Set the last bit of the dma as the final packet for this dma 176 // and set it's completion event. 177 if (prevSize == size) { |
188 DmaReqState *state = new DmaReqState(event, true); 189 190 pkt->senderState = (void*)state; | 178 pkt->senderState = new DmaReqState(event, true); |
191 } 192 assert(pendingCount >= 0); 193 pendingCount++; 194 sendDma(pkt); 195 } | 179 } 180 assert(pendingCount >= 0); 181 pendingCount++; 182 sendDma(pkt); 183 } |
196 // since this isn't getting used and we want a check to make sure that all 197 // packets had data in them at some point. 198 basePkt.dataStatic((uint8_t*)NULL); | |
199} 200 201 202void 203DmaPort::sendDma(Packet *pkt) 204{ 205 // some kind of selction between access methods 206 // more work is going to have to be done to make 207 // switching actually work 208 /* MemState state = device->platform->system->memState; 209 210 if (state == Timing) { | 184} 185 186 187void 188DmaPort::sendDma(Packet *pkt) 189{ 190 // some kind of selction between access methods 191 // more work is going to have to be done to make 192 // switching actually work 193 /* MemState state = device->platform->system->memState; 194 195 if (state == Timing) { |
211 if (sendTiming(pkt) == Failure) | 196 if (!sendTiming(pkt)) |
212 transmitList.push_back(&packet); 213 } else if (state == Atomic) {*/ 214 sendAtomic(pkt); 215 if (pkt->senderState) { | 197 transmitList.push_back(&packet); 198 } else if (state == Atomic) {*/ 199 sendAtomic(pkt); 200 if (pkt->senderState) { |
216 DmaReqState *state = (DmaReqState*)pkt->senderState; | 201 DmaReqState *state = dynamic_cast<DmaReqState*>(pkt->senderState); |
217 state->completionEvent->schedule(curTick + (pkt->time - pkt->req->getTime()) +1); 218 } 219 pendingCount--; 220 assert(pendingCount >= 0); 221 delete pkt->req; 222 delete pkt; 223 224/* } else if (state == Functional) { --- 16 unchanged lines hidden --- | 202 state->completionEvent->schedule(curTick + (pkt->time - pkt->req->getTime()) +1); 203 } 204 pendingCount--; 205 assert(pendingCount >= 0); 206 delete pkt->req; 207 delete pkt; 208 209/* } else if (state == Functional) { --- 16 unchanged lines hidden --- |