1/* 2 * Copyright (c) 2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 85 unchanged lines hidden (view full) --- 94BasicPioDevice::addressRanges(AddrRangeList &range_list) 95{ 96 assert(pioSize != 0); 97 range_list.clear(); 98 range_list.push_back(RangeSize(pioAddr, pioSize)); 99} 100 101 |
102DmaPort::DmaPort(MemObject *dev, System *s, Tick min_backoff, Tick max_backoff) |
103 : Port(dev->name() + "-dmaport", dev), device(dev), sys(s), 104 pendingCount(0), actionInProgress(0), drainEvent(NULL), |
105 backoffTime(0), minBackoffDelay(min_backoff), 106 maxBackoffDelay(max_backoff), inRetry(false), backoffEvent(this) |
107{ } 108 109bool 110DmaPort::recvTiming(PacketPtr pkt) 111{ 112 if (pkt->wasNacked()) { 113 DPRINTF(DMA, "Received nacked %s addr %#x\n", 114 pkt->cmdString(), pkt->getAddr()); 115 |
116 if (backoffTime < minBackoffDelay) 117 backoffTime = minBackoffDelay; 118 else if (backoffTime < maxBackoffDelay) |
119 backoffTime <<= 1; 120 121 reschedule(backoffEvent, curTick + backoffTime, true); 122 123 DPRINTF(DMA, "Backoff time set to %d ticks\n", backoffTime); 124 125 pkt->reinitNacked(); 126 queueDma(pkt, true); --- 7 unchanged lines hidden (view full) --- 134 pendingCount--; 135 136 assert(pendingCount >= 0); 137 assert(state); 138 139 state->numBytes += pkt->req->getSize(); 140 assert(state->totBytes >= state->numBytes); 141 if (state->totBytes == state->numBytes) { |
142 if (state->completionEvent) { 143 if (state->delay) 144 schedule(state->completionEvent, curTick + state->delay); 145 else 146 state->completionEvent->process(); 147 } |
148 delete state; 149 } 150 delete pkt->req; 151 delete pkt; 152 153 if (pendingCount == 0 && drainEvent) { 154 drainEvent->process(); 155 drainEvent = NULL; 156 } 157 } else { 158 panic("Got packet without sender state... huh?\n"); 159 } 160 161 return true; 162} 163 164DmaDevice::DmaDevice(const Params *p) |
165 : PioDevice(p), dmaPort(NULL) |
166{ } 167 168 169unsigned int 170DmaDevice::drain(Event *de) 171{ 172 unsigned int count; 173 count = pioPort->drain(de) + dmaPort->drain(de); --- 44 unchanged lines hidden (view full) --- 218 backoffEvent.scheduled()); 219} 220 221 222void 223DmaPort::dmaAction(Packet::Command cmd, Addr addr, int size, Event *event, 224 uint8_t *data, Tick delay) 225{ |
226 assert(device->getState() == SimObject::Running); 227 228 DmaReqState *reqState = new DmaReqState(event, this, size, delay); 229 230 231 DPRINTF(DMA, "Starting DMA for addr: %#x size: %d sched: %d\n", addr, size, 232 event->scheduled()); 233 for (ChunkGenerator gen(addr, size, peerBlockSize()); --- 74 unchanged lines hidden (view full) --- 308 lat = sendAtomic(pkt); 309 assert(pkt->senderState); 310 DmaReqState *state = dynamic_cast<DmaReqState*>(pkt->senderState); 311 assert(state); 312 state->numBytes += pkt->req->getSize(); 313 314 DPRINTF(DMA, "--Received response for DMA for addr: %#x size: %d nb: %d, tot: %d sched %d\n", 315 pkt->req->getPaddr(), pkt->req->getSize(), state->numBytes, |
316 state->totBytes, 317 state->completionEvent ? state->completionEvent->scheduled() : 0 ); |
318 319 if (state->totBytes == state->numBytes) { |
320 if (state->completionEvent) { 321 assert(!state->completionEvent->scheduled()); 322 schedule(state->completionEvent, curTick + lat + state->delay); 323 } |
324 delete state; 325 delete pkt->req; 326 } 327 pendingCount--; 328 assert(pendingCount >= 0); 329 delete pkt; 330 331 if (pendingCount == 0 && drainEvent) { --- 13 unchanged lines hidden --- |