intel_8254_timer.cc (7064:586b0e3a12b3) | intel_8254_timer.cc (7559:017baf09599f) |
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1/* 2 * Copyright (c) 2004, 2005 3 * The Regents of The University of Michigan 4 * All Rights Reserved 5 * 6 * This code is part of the M5 simulator. 7 * 8 * Permission is granted to use, copy, create derivative works and --- 18 unchanged lines hidden (view full) --- 27 * 28 * Authors: Ali G. Saidi 29 * Andrew L. Schultz 30 * Miguel J. Serrano 31 */ 32 33#include "base/misc.hh" 34#include "dev/intel_8254_timer.hh" | 1/* 2 * Copyright (c) 2004, 2005 3 * The Regents of The University of Michigan 4 * All Rights Reserved 5 * 6 * This code is part of the M5 simulator. 7 * 8 * Permission is granted to use, copy, create derivative works and --- 18 unchanged lines hidden (view full) --- 27 * 28 * Authors: Ali G. Saidi 29 * Andrew L. Schultz 30 * Miguel J. Serrano 31 */ 32 33#include "base/misc.hh" 34#include "dev/intel_8254_timer.hh" |
35#include "sim/sim_object.hh" |
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35 36using namespace std; 37 38Intel8254Timer::Intel8254Timer(EventManager *em, const string &name, 39 Counter *counter0, Counter *counter1, Counter *counter2) : 40 EventManager(em), _name(name) 41{ 42 counter[0] = counter0; --- 21 unchanged lines hidden (view full) --- 64 counter[sel]->latchCount(); 65 else { 66 counter[sel]->setRW(data.rw); 67 counter[sel]->setMode(data.mode); 68 counter[sel]->setBCD(data.bcd); 69 } 70} 71 | 36 37using namespace std; 38 39Intel8254Timer::Intel8254Timer(EventManager *em, const string &name, 40 Counter *counter0, Counter *counter1, Counter *counter2) : 41 EventManager(em), _name(name) 42{ 43 counter[0] = counter0; --- 21 unchanged lines hidden (view full) --- 65 counter[sel]->latchCount(); 66 else { 67 counter[sel]->setRW(data.rw); 68 counter[sel]->setMode(data.mode); 69 counter[sel]->setBCD(data.bcd); 70 } 71} 72 |
73unsigned int 74Intel8254Timer::drain(Event *de) 75{ 76 unsigned int count = 0; 77 count += counter[0]->drain(de); 78 count += counter[1]->drain(de); 79 count += counter[2]->drain(de); 80 assert(count == 0); 81 return count; 82} 83 |
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72void 73Intel8254Timer::serialize(const string &base, ostream &os) 74{ 75 // serialize the counters 76 counter[0]->serialize(base + ".counter0", os); 77 counter[1]->serialize(base + ".counter1", os); 78 counter[2]->serialize(base + ".counter2", os); 79} --- 131 unchanged lines hidden (view full) --- 211} 212 213bool 214Intel8254Timer::Counter::outputHigh() 215{ 216 return output_high; 217} 218 | 84void 85Intel8254Timer::serialize(const string &base, ostream &os) 86{ 87 // serialize the counters 88 counter[0]->serialize(base + ".counter0", os); 89 counter[1]->serialize(base + ".counter1", os); 90 counter[2]->serialize(base + ".counter2", os); 91} --- 131 unchanged lines hidden (view full) --- 223} 224 225bool 226Intel8254Timer::Counter::outputHigh() 227{ 228 return output_high; 229} 230 |
231unsigned int 232Intel8254Timer::Counter::drain(Event *de) 233{ 234 if (event.scheduled()) { 235 event_tick = event.when(); 236 parent->deschedule(event); 237 } else { 238 event_tick = 0; 239 } 240 return 0; 241} 242 |
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219void 220Intel8254Timer::Counter::serialize(const string &base, ostream &os) 221{ 222 paramOut(os, base + ".initial_count", initial_count); 223 paramOut(os, base + ".latched_count", latched_count); 224 paramOut(os, base + ".period", period); 225 paramOut(os, base + ".mode", mode); 226 paramOut(os, base + ".output_high", output_high); 227 paramOut(os, base + ".latch_on", latch_on); 228 paramOut(os, base + ".read_byte", read_byte); 229 paramOut(os, base + ".write_byte", write_byte); | 243void 244Intel8254Timer::Counter::serialize(const string &base, ostream &os) 245{ 246 paramOut(os, base + ".initial_count", initial_count); 247 paramOut(os, base + ".latched_count", latched_count); 248 paramOut(os, base + ".period", period); 249 paramOut(os, base + ".mode", mode); 250 paramOut(os, base + ".output_high", output_high); 251 paramOut(os, base + ".latch_on", latch_on); 252 paramOut(os, base + ".read_byte", read_byte); 253 paramOut(os, base + ".write_byte", write_byte); |
230 231 Tick event_tick = 0; 232 if (event.scheduled()) 233 event_tick = event.when(); | |
234 paramOut(os, base + ".event_tick", event_tick); 235} 236 237void 238Intel8254Timer::Counter::unserialize(const string &base, Checkpoint *cp, 239 const string §ion) 240{ 241 paramIn(cp, section, base + ".initial_count", initial_count); 242 paramIn(cp, section, base + ".latched_count", latched_count); 243 paramIn(cp, section, base + ".period", period); 244 paramIn(cp, section, base + ".mode", mode); 245 paramIn(cp, section, base + ".output_high", output_high); 246 paramIn(cp, section, base + ".latch_on", latch_on); 247 paramIn(cp, section, base + ".read_byte", read_byte); 248 paramIn(cp, section, base + ".write_byte", write_byte); 249 | 254 paramOut(os, base + ".event_tick", event_tick); 255} 256 257void 258Intel8254Timer::Counter::unserialize(const string &base, Checkpoint *cp, 259 const string §ion) 260{ 261 paramIn(cp, section, base + ".initial_count", initial_count); 262 paramIn(cp, section, base + ".latched_count", latched_count); 263 paramIn(cp, section, base + ".period", period); 264 paramIn(cp, section, base + ".mode", mode); 265 paramIn(cp, section, base + ".output_high", output_high); 266 paramIn(cp, section, base + ".latch_on", latch_on); 267 paramIn(cp, section, base + ".read_byte", read_byte); 268 paramIn(cp, section, base + ".write_byte", write_byte); 269 |
250 Tick event_tick; | |
251 paramIn(cp, section, base + ".event_tick", event_tick); 252 if (event_tick) 253 parent->schedule(event, event_tick); 254} 255 256Intel8254Timer::Counter::CounterEvent::CounterEvent(Counter* c_ptr) 257{ 258 interval = (Tick)(SimClock::Float::s / 1193180.0); --- 43 unchanged lines hidden --- | 270 paramIn(cp, section, base + ".event_tick", event_tick); 271 if (event_tick) 272 parent->schedule(event, event_tick); 273} 274 275Intel8254Timer::Counter::CounterEvent::CounterEvent(Counter* c_ptr) 276{ 277 interval = (Tick)(SimClock::Float::s / 1193180.0); --- 43 unchanged lines hidden --- |