1/*
2 * Copyright (c) 2004, 2005
3 * The Regents of The University of Michigan
4 * All Rights Reserved
5 *
6 * This code is part of the M5 simulator.
7 *
8 * Permission is granted to use, copy, create derivative works and
9 * redistribute this software and such derivative works for any
10 * purpose, so long as the copyright notice above, this grant of
11 * permission, and the disclaimer below appear in all copies made; and
12 * so long as the name of The University of Michigan is not used in
13 * any advertising or publicity pertaining to the use or distribution
14 * of this software without specific, written prior authorization.
15 *
16 * THIS SOFTWARE IS PROVIDED AS IS, WITHOUT REPRESENTATION FROM THE
17 * UNIVERSITY OF MICHIGAN AS TO ITS FITNESS FOR ANY PURPOSE, AND
18 * WITHOUT WARRANTY BY THE UNIVERSITY OF MICHIGAN OF ANY KIND, EITHER
19 * EXPRESS OR IMPLIED, INCLUDING WITHOUT LIMITATION THE IMPLIED
20 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
21 * PURPOSE. THE REGENTS OF THE UNIVERSITY OF MICHIGAN SHALL NOT BE
22 * LIABLE FOR ANY DAMAGES, INCLUDING DIRECT, SPECIAL, INDIRECT,
23 * INCIDENTAL, OR CONSEQUENTIAL DAMAGES, WITH RESPECT TO ANY CLAIM
24 * ARISING OUT OF OR IN CONNECTION WITH THE USE OF THE SOFTWARE, EVEN
25 * IF IT HAS BEEN OR IS HEREAFTER ADVISED OF THE POSSIBILITY OF SUCH
26 * DAMAGES.
27 *
28 * Authors: Ali G. Saidi
29 * Andrew L. Schultz
30 * Miguel J. Serrano
31 */
32
33#include "base/misc.hh"
| 1/*
2 * Copyright (c) 2004, 2005
3 * The Regents of The University of Michigan
4 * All Rights Reserved
5 *
6 * This code is part of the M5 simulator.
7 *
8 * Permission is granted to use, copy, create derivative works and
9 * redistribute this software and such derivative works for any
10 * purpose, so long as the copyright notice above, this grant of
11 * permission, and the disclaimer below appear in all copies made; and
12 * so long as the name of The University of Michigan is not used in
13 * any advertising or publicity pertaining to the use or distribution
14 * of this software without specific, written prior authorization.
15 *
16 * THIS SOFTWARE IS PROVIDED AS IS, WITHOUT REPRESENTATION FROM THE
17 * UNIVERSITY OF MICHIGAN AS TO ITS FITNESS FOR ANY PURPOSE, AND
18 * WITHOUT WARRANTY BY THE UNIVERSITY OF MICHIGAN OF ANY KIND, EITHER
19 * EXPRESS OR IMPLIED, INCLUDING WITHOUT LIMITATION THE IMPLIED
20 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
21 * PURPOSE. THE REGENTS OF THE UNIVERSITY OF MICHIGAN SHALL NOT BE
22 * LIABLE FOR ANY DAMAGES, INCLUDING DIRECT, SPECIAL, INDIRECT,
23 * INCIDENTAL, OR CONSEQUENTIAL DAMAGES, WITH RESPECT TO ANY CLAIM
24 * ARISING OUT OF OR IN CONNECTION WITH THE USE OF THE SOFTWARE, EVEN
25 * IF IT HAS BEEN OR IS HEREAFTER ADVISED OF THE POSSIBILITY OF SUCH
26 * DAMAGES.
27 *
28 * Authors: Ali G. Saidi
29 * Andrew L. Schultz
30 * Miguel J. Serrano
31 */
32
33#include "base/misc.hh"
|
34#include "dev/intel_8254_timer.hh"
35
36using namespace std;
37
38Intel8254Timer::Intel8254Timer(EventManager *em, const string &name,
39 Counter *counter0, Counter *counter1, Counter *counter2) :
40 EventManager(em), _name(name)
41{
42 counter[0] = counter0;
43 counter[1] = counter1;
44 counter[2] = counter2;
45}
46
47Intel8254Timer::Intel8254Timer(EventManager *em, const string &name) :
48 EventManager(em), _name(name)
49{
50 counter[0] = new Counter(this, name + ".counter0", 0);
51 counter[1] = new Counter(this, name + ".counter1", 1);
52 counter[2] = new Counter(this, name + ".counter2", 2);
53}
54
55void
56Intel8254Timer::writeControl(const CtrlReg data)
57{
58 int sel = data.sel;
59
60 if (sel == ReadBackCommand)
61 panic("PITimer Read-Back Command is not implemented.\n");
62
63 if (data.rw == LatchCommand)
64 counter[sel]->latchCount();
65 else {
66 counter[sel]->setRW(data.rw);
67 counter[sel]->setMode(data.mode);
68 counter[sel]->setBCD(data.bcd);
69 }
70}
71
72void
73Intel8254Timer::serialize(const string &base, ostream &os)
74{
75 // serialize the counters
76 counter[0]->serialize(base + ".counter0", os);
77 counter[1]->serialize(base + ".counter1", os);
78 counter[2]->serialize(base + ".counter2", os);
79}
80
81void
82Intel8254Timer::unserialize(const string &base, Checkpoint *cp,
83 const string §ion)
84{
85 // unserialze the counters
86 counter[0]->unserialize(base + ".counter0", cp, section);
87 counter[1]->unserialize(base + ".counter1", cp, section);
88 counter[2]->unserialize(base + ".counter2", cp, section);
89}
90
91Intel8254Timer::Counter::Counter(Intel8254Timer *p,
92 const string &name, unsigned int _num)
93 : _name(name), num(_num), event(this), initial_count(0),
94 latched_count(0), period(0), mode(0), output_high(false),
95 latch_on(false), read_byte(LSB), write_byte(LSB), parent(p)
96{
97
98}
99
100void
101Intel8254Timer::Counter::latchCount()
102{
103 // behave like a real latch
104 if(!latch_on) {
105 latch_on = true;
106 read_byte = LSB;
107 latched_count = currentCount();
108 }
109}
110
111int
112Intel8254Timer::Counter::currentCount()
113{
114 int clocks = event.clocksLeft();
115 if (clocks == -1) {
116 warn_once("Reading current count from inactive timer.\n");
117 return 0;
118 }
119 if (mode == RateGen || mode == SquareWave)
120 return clocks + 1;
121 else
122 return clocks;
123}
124
125uint8_t
126Intel8254Timer::Counter::read()
127{
128 if (latch_on) {
129 switch (read_byte) {
130 case LSB:
131 read_byte = MSB;
132 return (uint8_t)latched_count;
133 break;
134 case MSB:
135 read_byte = LSB;
136 latch_on = false;
137 return latched_count >> 8;
138 break;
139 default:
140 panic("Shouldn't be here");
141 }
142 } else {
143 uint16_t count = currentCount();
144 switch (read_byte) {
145 case LSB:
146 read_byte = MSB;
147 return (uint8_t)count;
148 break;
149 case MSB:
150 read_byte = LSB;
151 return count >> 8;
152 break;
153 default:
154 panic("Shouldn't be here");
155 }
156 }
157}
158
159void
160Intel8254Timer::Counter::write(const uint8_t data)
161{
162 switch (write_byte) {
163 case LSB:
164 initial_count = (initial_count & 0xFF00) | data;
165
166 if (event.scheduled())
167 parent->deschedule(event);
168 output_high = false;
169 write_byte = MSB;
170 break;
171
172 case MSB:
173 initial_count = (initial_count & 0x00FF) | (data << 8);
174 // In the RateGen or SquareWave modes, the timer wraps around and
175 // triggers on a value of 1, not 0.
176 if (mode == RateGen || mode == SquareWave)
177 period = initial_count - 1;
178 else
179 period = initial_count;
180
181 if (period > 0)
182 event.setTo(period);
183
184 write_byte = LSB;
185 break;
186 }
187}
188
189void
190Intel8254Timer::Counter::setRW(int rw_val)
191{
192 if (rw_val != TwoPhase)
193 panic("Only LSB/MSB read/write is implemented.\n");
194}
195
196void
197Intel8254Timer::Counter::setMode(int mode_val)
198{
199 if(mode_val != InitTc && mode_val != RateGen &&
200 mode_val != SquareWave)
201 panic("PIT mode %#x is not implemented: \n", mode_val);
202
203 mode = mode_val;
204}
205
206void
207Intel8254Timer::Counter::setBCD(int bcd_val)
208{
209 if (bcd_val)
210 panic("PITimer does not implement BCD counts.\n");
211}
212
213bool
214Intel8254Timer::Counter::outputHigh()
215{
216 return output_high;
217}
218
219void
220Intel8254Timer::Counter::serialize(const string &base, ostream &os)
221{
222 paramOut(os, base + ".initial_count", initial_count);
223 paramOut(os, base + ".latched_count", latched_count);
224 paramOut(os, base + ".period", period);
225 paramOut(os, base + ".mode", mode);
226 paramOut(os, base + ".output_high", output_high);
227 paramOut(os, base + ".latch_on", latch_on);
228 paramOut(os, base + ".read_byte", read_byte);
229 paramOut(os, base + ".write_byte", write_byte);
230
231 Tick event_tick = 0;
232 if (event.scheduled())
233 event_tick = event.when();
234 paramOut(os, base + ".event_tick", event_tick);
235}
236
237void
238Intel8254Timer::Counter::unserialize(const string &base, Checkpoint *cp,
239 const string §ion)
240{
241 paramIn(cp, section, base + ".initial_count", initial_count);
242 paramIn(cp, section, base + ".latched_count", latched_count);
243 paramIn(cp, section, base + ".period", period);
244 paramIn(cp, section, base + ".mode", mode);
245 paramIn(cp, section, base + ".output_high", output_high);
246 paramIn(cp, section, base + ".latch_on", latch_on);
247 paramIn(cp, section, base + ".read_byte", read_byte);
248 paramIn(cp, section, base + ".write_byte", write_byte);
249
250 Tick event_tick = 0;
251 if (event.scheduled())
252 parent->deschedule(event);
253 paramIn(cp, section, base + ".event_tick", event_tick);
254 if (event_tick)
255 parent->schedule(event, event_tick);
256}
257
258Intel8254Timer::Counter::CounterEvent::CounterEvent(Counter* c_ptr)
259{
260 interval = (Tick)(SimClock::Float::s / 1193180.0);
261 counter = c_ptr;
262}
263
264void
265Intel8254Timer::Counter::CounterEvent::process()
266{
267 switch (counter->mode) {
268 case InitTc:
269 counter->output_high = true;
270 break;
271 case RateGen:
272 case SquareWave:
273 setTo(counter->period);
274 break;
275 default:
276 panic("Unimplemented PITimer mode.\n");
277 }
278 counter->parent->counterInterrupt(counter->num);
279}
280
281void
282Intel8254Timer::Counter::CounterEvent::setTo(int clocks)
283{
284 if (clocks == 0)
285 panic("Timer can't be set to go off instantly.\n");
286 DPRINTF(Intel8254Timer, "Timer set to curTick() + %d\n",
287 clocks * interval);
288 counter->parent->schedule(this, curTick() + clocks * interval);
289}
290
291int
292Intel8254Timer::Counter::CounterEvent::clocksLeft()
293{
294 if (!scheduled())
295 return -1;
296 return (when() - curTick() + interval - 1) / interval;
297}
298
299const char *
300Intel8254Timer::Counter::CounterEvent::description() const
301{
302 return "Intel 8254 Interval timer";
303}
| 35#include "dev/intel_8254_timer.hh"
36
37using namespace std;
38
39Intel8254Timer::Intel8254Timer(EventManager *em, const string &name,
40 Counter *counter0, Counter *counter1, Counter *counter2) :
41 EventManager(em), _name(name)
42{
43 counter[0] = counter0;
44 counter[1] = counter1;
45 counter[2] = counter2;
46}
47
48Intel8254Timer::Intel8254Timer(EventManager *em, const string &name) :
49 EventManager(em), _name(name)
50{
51 counter[0] = new Counter(this, name + ".counter0", 0);
52 counter[1] = new Counter(this, name + ".counter1", 1);
53 counter[2] = new Counter(this, name + ".counter2", 2);
54}
55
56void
57Intel8254Timer::writeControl(const CtrlReg data)
58{
59 int sel = data.sel;
60
61 if (sel == ReadBackCommand)
62 panic("PITimer Read-Back Command is not implemented.\n");
63
64 if (data.rw == LatchCommand)
65 counter[sel]->latchCount();
66 else {
67 counter[sel]->setRW(data.rw);
68 counter[sel]->setMode(data.mode);
69 counter[sel]->setBCD(data.bcd);
70 }
71}
72
73void
74Intel8254Timer::serialize(const string &base, ostream &os)
75{
76 // serialize the counters
77 counter[0]->serialize(base + ".counter0", os);
78 counter[1]->serialize(base + ".counter1", os);
79 counter[2]->serialize(base + ".counter2", os);
80}
81
82void
83Intel8254Timer::unserialize(const string &base, Checkpoint *cp,
84 const string §ion)
85{
86 // unserialze the counters
87 counter[0]->unserialize(base + ".counter0", cp, section);
88 counter[1]->unserialize(base + ".counter1", cp, section);
89 counter[2]->unserialize(base + ".counter2", cp, section);
90}
91
92Intel8254Timer::Counter::Counter(Intel8254Timer *p,
93 const string &name, unsigned int _num)
94 : _name(name), num(_num), event(this), initial_count(0),
95 latched_count(0), period(0), mode(0), output_high(false),
96 latch_on(false), read_byte(LSB), write_byte(LSB), parent(p)
97{
98
99}
100
101void
102Intel8254Timer::Counter::latchCount()
103{
104 // behave like a real latch
105 if(!latch_on) {
106 latch_on = true;
107 read_byte = LSB;
108 latched_count = currentCount();
109 }
110}
111
112int
113Intel8254Timer::Counter::currentCount()
114{
115 int clocks = event.clocksLeft();
116 if (clocks == -1) {
117 warn_once("Reading current count from inactive timer.\n");
118 return 0;
119 }
120 if (mode == RateGen || mode == SquareWave)
121 return clocks + 1;
122 else
123 return clocks;
124}
125
126uint8_t
127Intel8254Timer::Counter::read()
128{
129 if (latch_on) {
130 switch (read_byte) {
131 case LSB:
132 read_byte = MSB;
133 return (uint8_t)latched_count;
134 break;
135 case MSB:
136 read_byte = LSB;
137 latch_on = false;
138 return latched_count >> 8;
139 break;
140 default:
141 panic("Shouldn't be here");
142 }
143 } else {
144 uint16_t count = currentCount();
145 switch (read_byte) {
146 case LSB:
147 read_byte = MSB;
148 return (uint8_t)count;
149 break;
150 case MSB:
151 read_byte = LSB;
152 return count >> 8;
153 break;
154 default:
155 panic("Shouldn't be here");
156 }
157 }
158}
159
160void
161Intel8254Timer::Counter::write(const uint8_t data)
162{
163 switch (write_byte) {
164 case LSB:
165 initial_count = (initial_count & 0xFF00) | data;
166
167 if (event.scheduled())
168 parent->deschedule(event);
169 output_high = false;
170 write_byte = MSB;
171 break;
172
173 case MSB:
174 initial_count = (initial_count & 0x00FF) | (data << 8);
175 // In the RateGen or SquareWave modes, the timer wraps around and
176 // triggers on a value of 1, not 0.
177 if (mode == RateGen || mode == SquareWave)
178 period = initial_count - 1;
179 else
180 period = initial_count;
181
182 if (period > 0)
183 event.setTo(period);
184
185 write_byte = LSB;
186 break;
187 }
188}
189
190void
191Intel8254Timer::Counter::setRW(int rw_val)
192{
193 if (rw_val != TwoPhase)
194 panic("Only LSB/MSB read/write is implemented.\n");
195}
196
197void
198Intel8254Timer::Counter::setMode(int mode_val)
199{
200 if(mode_val != InitTc && mode_val != RateGen &&
201 mode_val != SquareWave)
202 panic("PIT mode %#x is not implemented: \n", mode_val);
203
204 mode = mode_val;
205}
206
207void
208Intel8254Timer::Counter::setBCD(int bcd_val)
209{
210 if (bcd_val)
211 panic("PITimer does not implement BCD counts.\n");
212}
213
214bool
215Intel8254Timer::Counter::outputHigh()
216{
217 return output_high;
218}
219
220void
221Intel8254Timer::Counter::serialize(const string &base, ostream &os)
222{
223 paramOut(os, base + ".initial_count", initial_count);
224 paramOut(os, base + ".latched_count", latched_count);
225 paramOut(os, base + ".period", period);
226 paramOut(os, base + ".mode", mode);
227 paramOut(os, base + ".output_high", output_high);
228 paramOut(os, base + ".latch_on", latch_on);
229 paramOut(os, base + ".read_byte", read_byte);
230 paramOut(os, base + ".write_byte", write_byte);
231
232 Tick event_tick = 0;
233 if (event.scheduled())
234 event_tick = event.when();
235 paramOut(os, base + ".event_tick", event_tick);
236}
237
238void
239Intel8254Timer::Counter::unserialize(const string &base, Checkpoint *cp,
240 const string §ion)
241{
242 paramIn(cp, section, base + ".initial_count", initial_count);
243 paramIn(cp, section, base + ".latched_count", latched_count);
244 paramIn(cp, section, base + ".period", period);
245 paramIn(cp, section, base + ".mode", mode);
246 paramIn(cp, section, base + ".output_high", output_high);
247 paramIn(cp, section, base + ".latch_on", latch_on);
248 paramIn(cp, section, base + ".read_byte", read_byte);
249 paramIn(cp, section, base + ".write_byte", write_byte);
250
251 Tick event_tick = 0;
252 if (event.scheduled())
253 parent->deschedule(event);
254 paramIn(cp, section, base + ".event_tick", event_tick);
255 if (event_tick)
256 parent->schedule(event, event_tick);
257}
258
259Intel8254Timer::Counter::CounterEvent::CounterEvent(Counter* c_ptr)
260{
261 interval = (Tick)(SimClock::Float::s / 1193180.0);
262 counter = c_ptr;
263}
264
265void
266Intel8254Timer::Counter::CounterEvent::process()
267{
268 switch (counter->mode) {
269 case InitTc:
270 counter->output_high = true;
271 break;
272 case RateGen:
273 case SquareWave:
274 setTo(counter->period);
275 break;
276 default:
277 panic("Unimplemented PITimer mode.\n");
278 }
279 counter->parent->counterInterrupt(counter->num);
280}
281
282void
283Intel8254Timer::Counter::CounterEvent::setTo(int clocks)
284{
285 if (clocks == 0)
286 panic("Timer can't be set to go off instantly.\n");
287 DPRINTF(Intel8254Timer, "Timer set to curTick() + %d\n",
288 clocks * interval);
289 counter->parent->schedule(this, curTick() + clocks * interval);
290}
291
292int
293Intel8254Timer::Counter::CounterEvent::clocksLeft()
294{
295 if (!scheduled())
296 return -1;
297 return (when() - curTick() + interval - 1) / interval;
298}
299
300const char *
301Intel8254Timer::Counter::CounterEvent::description() const
302{
303 return "Intel 8254 Interval timer";
304}
|