1/*
2 * Copyright (c) 2004, 2005
3 * The Regents of The University of Michigan
4 * All Rights Reserved
5 *
6 * This code is part of the M5 simulator.
7 *
8 * Permission is granted to use, copy, create derivative works and
9 * redistribute this software and such derivative works for any
10 * purpose, so long as the copyright notice above, this grant of
11 * permission, and the disclaimer below appear in all copies made; and
12 * so long as the name of The University of Michigan is not used in
13 * any advertising or publicity pertaining to the use or distribution
14 * of this software without specific, written prior authorization.
15 *
16 * THIS SOFTWARE IS PROVIDED AS IS, WITHOUT REPRESENTATION FROM THE
17 * UNIVERSITY OF MICHIGAN AS TO ITS FITNESS FOR ANY PURPOSE, AND
18 * WITHOUT WARRANTY BY THE UNIVERSITY OF MICHIGAN OF ANY KIND, EITHER
19 * EXPRESS OR IMPLIED, INCLUDING WITHOUT LIMITATION THE IMPLIED
20 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
21 * PURPOSE. THE REGENTS OF THE UNIVERSITY OF MICHIGAN SHALL NOT BE
22 * LIABLE FOR ANY DAMAGES, INCLUDING DIRECT, SPECIAL, INDIRECT,
23 * INCIDENTAL, OR CONSEQUENTIAL DAMAGES, WITH RESPECT TO ANY CLAIM
24 * ARISING OUT OF OR IN CONNECTION WITH THE USE OF THE SOFTWARE, EVEN
25 * IF IT HAS BEEN OR IS HEREAFTER ADVISED OF THE POSSIBILITY OF SUCH
26 * DAMAGES.
27 *
28 * Authors: Ali G. Saidi
29 * Andrew L. Schultz
30 * Miguel J. Serrano
31 */
32
33#include "base/misc.hh"
34#include "debug/Intel8254Timer.hh"
35#include "dev/intel_8254_timer.hh"
36
37using namespace std;
38
39Intel8254Timer::Intel8254Timer(EventManager *em, const string &name,
40 Counter *counter0, Counter *counter1, Counter *counter2) :
41 EventManager(em), _name(name)
42{
43 counter[0] = counter0;
44 counter[1] = counter1;
45 counter[2] = counter2;
46}
47
48Intel8254Timer::Intel8254Timer(EventManager *em, const string &name) :
49 EventManager(em), _name(name)
50{
51 counter[0] = new Counter(this, name + ".counter0", 0);
52 counter[1] = new Counter(this, name + ".counter1", 1);
53 counter[2] = new Counter(this, name + ".counter2", 2);
54}
55
56void
57Intel8254Timer::writeControl(const CtrlReg data)
58{
59 int sel = data.sel;
60
61 if (sel == ReadBackCommand)
62 panic("PITimer Read-Back Command is not implemented.\n");
63
64 if (data.rw == LatchCommand)
65 counter[sel]->latchCount();
66 else {
67 counter[sel]->setRW(data.rw);
68 counter[sel]->setMode(data.mode);
69 counter[sel]->setBCD(data.bcd);
70 }
71}
72
73void
| 1/*
2 * Copyright (c) 2004, 2005
3 * The Regents of The University of Michigan
4 * All Rights Reserved
5 *
6 * This code is part of the M5 simulator.
7 *
8 * Permission is granted to use, copy, create derivative works and
9 * redistribute this software and such derivative works for any
10 * purpose, so long as the copyright notice above, this grant of
11 * permission, and the disclaimer below appear in all copies made; and
12 * so long as the name of The University of Michigan is not used in
13 * any advertising or publicity pertaining to the use or distribution
14 * of this software without specific, written prior authorization.
15 *
16 * THIS SOFTWARE IS PROVIDED AS IS, WITHOUT REPRESENTATION FROM THE
17 * UNIVERSITY OF MICHIGAN AS TO ITS FITNESS FOR ANY PURPOSE, AND
18 * WITHOUT WARRANTY BY THE UNIVERSITY OF MICHIGAN OF ANY KIND, EITHER
19 * EXPRESS OR IMPLIED, INCLUDING WITHOUT LIMITATION THE IMPLIED
20 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
21 * PURPOSE. THE REGENTS OF THE UNIVERSITY OF MICHIGAN SHALL NOT BE
22 * LIABLE FOR ANY DAMAGES, INCLUDING DIRECT, SPECIAL, INDIRECT,
23 * INCIDENTAL, OR CONSEQUENTIAL DAMAGES, WITH RESPECT TO ANY CLAIM
24 * ARISING OUT OF OR IN CONNECTION WITH THE USE OF THE SOFTWARE, EVEN
25 * IF IT HAS BEEN OR IS HEREAFTER ADVISED OF THE POSSIBILITY OF SUCH
26 * DAMAGES.
27 *
28 * Authors: Ali G. Saidi
29 * Andrew L. Schultz
30 * Miguel J. Serrano
31 */
32
33#include "base/misc.hh"
34#include "debug/Intel8254Timer.hh"
35#include "dev/intel_8254_timer.hh"
36
37using namespace std;
38
39Intel8254Timer::Intel8254Timer(EventManager *em, const string &name,
40 Counter *counter0, Counter *counter1, Counter *counter2) :
41 EventManager(em), _name(name)
42{
43 counter[0] = counter0;
44 counter[1] = counter1;
45 counter[2] = counter2;
46}
47
48Intel8254Timer::Intel8254Timer(EventManager *em, const string &name) :
49 EventManager(em), _name(name)
50{
51 counter[0] = new Counter(this, name + ".counter0", 0);
52 counter[1] = new Counter(this, name + ".counter1", 1);
53 counter[2] = new Counter(this, name + ".counter2", 2);
54}
55
56void
57Intel8254Timer::writeControl(const CtrlReg data)
58{
59 int sel = data.sel;
60
61 if (sel == ReadBackCommand)
62 panic("PITimer Read-Back Command is not implemented.\n");
63
64 if (data.rw == LatchCommand)
65 counter[sel]->latchCount();
66 else {
67 counter[sel]->setRW(data.rw);
68 counter[sel]->setMode(data.mode);
69 counter[sel]->setBCD(data.bcd);
70 }
71}
72
73void
|
74Intel8254Timer::serialize(const string &base, ostream &os)
| 74Intel8254Timer::serialize(const string &base, CheckpointOut &cp) const
|
75{
76 // serialize the counters
| 75{
76 // serialize the counters
|
77 counter[0]->serialize(base + ".counter0", os);
78 counter[1]->serialize(base + ".counter1", os);
79 counter[2]->serialize(base + ".counter2", os);
| 77 counter[0]->serialize(base + ".counter0", cp);
78 counter[1]->serialize(base + ".counter1", cp);
79 counter[2]->serialize(base + ".counter2", cp);
|
80}
81
82void
| 80}
81
82void
|
83Intel8254Timer::unserialize(const string &base, Checkpoint *cp,
84 const string §ion)
| 83Intel8254Timer::unserialize(const string &base, CheckpointIn &cp)
|
85{
86 // unserialze the counters
| 84{
85 // unserialze the counters
|
87 counter[0]->unserialize(base + ".counter0", cp, section);
88 counter[1]->unserialize(base + ".counter1", cp, section);
89 counter[2]->unserialize(base + ".counter2", cp, section);
| 86 counter[0]->unserialize(base + ".counter0", cp);
87 counter[1]->unserialize(base + ".counter1", cp);
88 counter[2]->unserialize(base + ".counter2", cp);
|
90}
91
92void
93Intel8254Timer::startup()
94{
95 counter[0]->startup();
96 counter[1]->startup();
97 counter[2]->startup();
98}
99
100Intel8254Timer::Counter::Counter(Intel8254Timer *p,
101 const string &name, unsigned int _num)
102 : _name(name), num(_num), event(this), running(false),
103 initial_count(0), latched_count(0), period(0), mode(0),
104 output_high(false), latch_on(false), read_byte(LSB),
105 write_byte(LSB), parent(p)
106{
107 offset = period * event.getInterval();
108}
109
110void
111Intel8254Timer::Counter::latchCount()
112{
113 // behave like a real latch
114 if(!latch_on) {
115 latch_on = true;
116 read_byte = LSB;
117 latched_count = currentCount();
118 }
119}
120
121int
122Intel8254Timer::Counter::currentCount()
123{
124 int clocks = event.clocksLeft();
125 if (clocks == -1) {
126 warn_once("Reading current count from inactive timer.\n");
127 return 0;
128 }
129 if (mode == RateGen || mode == SquareWave)
130 return clocks + 1;
131 else
132 return clocks;
133}
134
135uint8_t
136Intel8254Timer::Counter::read()
137{
138 if (latch_on) {
139 switch (read_byte) {
140 case LSB:
141 read_byte = MSB;
142 return (uint8_t)latched_count;
143 break;
144 case MSB:
145 read_byte = LSB;
146 latch_on = false;
147 return latched_count >> 8;
148 break;
149 default:
150 panic("Shouldn't be here");
151 }
152 } else {
153 uint16_t count = currentCount();
154 switch (read_byte) {
155 case LSB:
156 read_byte = MSB;
157 return (uint8_t)count;
158 break;
159 case MSB:
160 read_byte = LSB;
161 return count >> 8;
162 break;
163 default:
164 panic("Shouldn't be here");
165 }
166 }
167}
168
169void
170Intel8254Timer::Counter::write(const uint8_t data)
171{
172 switch (write_byte) {
173 case LSB:
174 initial_count = (initial_count & 0xFF00) | data;
175
176 if (event.scheduled())
177 parent->deschedule(event);
178 output_high = false;
179 write_byte = MSB;
180 break;
181
182 case MSB:
183 initial_count = (initial_count & 0x00FF) | (data << 8);
184 // In the RateGen or SquareWave modes, the timer wraps around and
185 // triggers on a value of 1, not 0.
186 if (mode == RateGen || mode == SquareWave)
187 period = initial_count - 1;
188 else
189 period = initial_count;
190
191 offset = period * event.getInterval();
192
193 if (running && (period > 0))
194 event.setTo(period);
195
196 write_byte = LSB;
197 break;
198 }
199}
200
201void
202Intel8254Timer::Counter::setRW(int rw_val)
203{
204 if (rw_val != TwoPhase)
205 panic("Only LSB/MSB read/write is implemented.\n");
206}
207
208void
209Intel8254Timer::Counter::setMode(int mode_val)
210{
211 if(mode_val != InitTc && mode_val != RateGen &&
212 mode_val != SquareWave)
213 panic("PIT mode %#x is not implemented: \n", mode_val);
214
215 mode = mode_val;
216}
217
218void
219Intel8254Timer::Counter::setBCD(int bcd_val)
220{
221 if (bcd_val)
222 panic("PITimer does not implement BCD counts.\n");
223}
224
225bool
226Intel8254Timer::Counter::outputHigh()
227{
228 return output_high;
229}
230
231void
| 89}
90
91void
92Intel8254Timer::startup()
93{
94 counter[0]->startup();
95 counter[1]->startup();
96 counter[2]->startup();
97}
98
99Intel8254Timer::Counter::Counter(Intel8254Timer *p,
100 const string &name, unsigned int _num)
101 : _name(name), num(_num), event(this), running(false),
102 initial_count(0), latched_count(0), period(0), mode(0),
103 output_high(false), latch_on(false), read_byte(LSB),
104 write_byte(LSB), parent(p)
105{
106 offset = period * event.getInterval();
107}
108
109void
110Intel8254Timer::Counter::latchCount()
111{
112 // behave like a real latch
113 if(!latch_on) {
114 latch_on = true;
115 read_byte = LSB;
116 latched_count = currentCount();
117 }
118}
119
120int
121Intel8254Timer::Counter::currentCount()
122{
123 int clocks = event.clocksLeft();
124 if (clocks == -1) {
125 warn_once("Reading current count from inactive timer.\n");
126 return 0;
127 }
128 if (mode == RateGen || mode == SquareWave)
129 return clocks + 1;
130 else
131 return clocks;
132}
133
134uint8_t
135Intel8254Timer::Counter::read()
136{
137 if (latch_on) {
138 switch (read_byte) {
139 case LSB:
140 read_byte = MSB;
141 return (uint8_t)latched_count;
142 break;
143 case MSB:
144 read_byte = LSB;
145 latch_on = false;
146 return latched_count >> 8;
147 break;
148 default:
149 panic("Shouldn't be here");
150 }
151 } else {
152 uint16_t count = currentCount();
153 switch (read_byte) {
154 case LSB:
155 read_byte = MSB;
156 return (uint8_t)count;
157 break;
158 case MSB:
159 read_byte = LSB;
160 return count >> 8;
161 break;
162 default:
163 panic("Shouldn't be here");
164 }
165 }
166}
167
168void
169Intel8254Timer::Counter::write(const uint8_t data)
170{
171 switch (write_byte) {
172 case LSB:
173 initial_count = (initial_count & 0xFF00) | data;
174
175 if (event.scheduled())
176 parent->deschedule(event);
177 output_high = false;
178 write_byte = MSB;
179 break;
180
181 case MSB:
182 initial_count = (initial_count & 0x00FF) | (data << 8);
183 // In the RateGen or SquareWave modes, the timer wraps around and
184 // triggers on a value of 1, not 0.
185 if (mode == RateGen || mode == SquareWave)
186 period = initial_count - 1;
187 else
188 period = initial_count;
189
190 offset = period * event.getInterval();
191
192 if (running && (period > 0))
193 event.setTo(period);
194
195 write_byte = LSB;
196 break;
197 }
198}
199
200void
201Intel8254Timer::Counter::setRW(int rw_val)
202{
203 if (rw_val != TwoPhase)
204 panic("Only LSB/MSB read/write is implemented.\n");
205}
206
207void
208Intel8254Timer::Counter::setMode(int mode_val)
209{
210 if(mode_val != InitTc && mode_val != RateGen &&
211 mode_val != SquareWave)
212 panic("PIT mode %#x is not implemented: \n", mode_val);
213
214 mode = mode_val;
215}
216
217void
218Intel8254Timer::Counter::setBCD(int bcd_val)
219{
220 if (bcd_val)
221 panic("PITimer does not implement BCD counts.\n");
222}
223
224bool
225Intel8254Timer::Counter::outputHigh()
226{
227 return output_high;
228}
229
230void
|
232Intel8254Timer::Counter::serialize(const string &base, ostream &os)
| 231Intel8254Timer::Counter::serialize(const string &base, CheckpointOut &cp) const
|
233{
| 232{
|
234 paramOut(os, base + ".initial_count", initial_count);
235 paramOut(os, base + ".latched_count", latched_count);
236 paramOut(os, base + ".period", period);
237 paramOut(os, base + ".mode", mode);
238 paramOut(os, base + ".output_high", output_high);
239 paramOut(os, base + ".latch_on", latch_on);
240 paramOut(os, base + ".read_byte", read_byte);
241 paramOut(os, base + ".write_byte", write_byte);
| 233 paramOut(cp, base + ".initial_count", initial_count);
234 paramOut(cp, base + ".latched_count", latched_count);
235 paramOut(cp, base + ".period", period);
236 paramOut(cp, base + ".mode", mode);
237 paramOut(cp, base + ".output_high", output_high);
238 paramOut(cp, base + ".latch_on", latch_on);
239 paramOut(cp, base + ".read_byte", read_byte);
240 paramOut(cp, base + ".write_byte", write_byte);
|
242
243 Tick event_tick_offset = 0;
244 if (event.scheduled())
245 event_tick_offset = event.when() - curTick();
| 241
242 Tick event_tick_offset = 0;
243 if (event.scheduled())
244 event_tick_offset = event.when() - curTick();
|
246 paramOut(os, base + ".event_tick_offset", event_tick_offset);
| 245 paramOut(cp, base + ".event_tick_offset", event_tick_offset);
|
247}
248
249void
| 246}
247
248void
|
250Intel8254Timer::Counter::unserialize(const string &base, Checkpoint *cp,
251 const string §ion)
| 249Intel8254Timer::Counter::unserialize(const string &base, CheckpointIn &cp)
|
252{
| 250{
|
253 paramIn(cp, section, base + ".initial_count", initial_count);
254 paramIn(cp, section, base + ".latched_count", latched_count);
255 paramIn(cp, section, base + ".period", period);
256 paramIn(cp, section, base + ".mode", mode);
257 paramIn(cp, section, base + ".output_high", output_high);
258 paramIn(cp, section, base + ".latch_on", latch_on);
259 paramIn(cp, section, base + ".read_byte", read_byte);
260 paramIn(cp, section, base + ".write_byte", write_byte);
| 251 paramIn(cp, base + ".initial_count", initial_count);
252 paramIn(cp, base + ".latched_count", latched_count);
253 paramIn(cp, base + ".period", period);
254 paramIn(cp, base + ".mode", mode);
255 paramIn(cp, base + ".output_high", output_high);
256 paramIn(cp, base + ".latch_on", latch_on);
257 paramIn(cp, base + ".read_byte", read_byte);
258 paramIn(cp, base + ".write_byte", write_byte);
|
261
262 Tick event_tick_offset = 0;
263 assert(!event.scheduled());
| 259
260 Tick event_tick_offset = 0;
261 assert(!event.scheduled());
|
264 paramIn(cp, section, base + ".event_tick_offset", event_tick_offset);
| 262 paramIn(cp, base + ".event_tick_offset", event_tick_offset);
|
265 offset = event_tick_offset;
266}
267
268void
269Intel8254Timer::Counter::startup()
270{
271 running = true;
272 if ((period > 0) && (offset > 0))
273 {
274 parent->schedule(event, curTick() + offset);
275 }
276}
277
278Intel8254Timer::Counter::CounterEvent::CounterEvent(Counter* c_ptr)
279{
280 interval = (Tick)(SimClock::Float::s / 1193180.0);
281 counter = c_ptr;
282}
283
284void
285Intel8254Timer::Counter::CounterEvent::process()
286{
287 switch (counter->mode) {
288 case InitTc:
289 counter->output_high = true;
290 break;
291 case RateGen:
292 case SquareWave:
293 setTo(counter->period);
294 break;
295 default:
296 panic("Unimplemented PITimer mode.\n");
297 }
298 counter->parent->counterInterrupt(counter->num);
299}
300
301void
302Intel8254Timer::Counter::CounterEvent::setTo(int clocks)
303{
304 if (clocks == 0)
305 panic("Timer can't be set to go off instantly.\n");
306 DPRINTF(Intel8254Timer, "Timer set to curTick() + %d\n",
307 clocks * interval);
308 counter->parent->schedule(this, curTick() + clocks * interval);
309}
310
311int
312Intel8254Timer::Counter::CounterEvent::clocksLeft()
313{
314 if (!scheduled())
315 return -1;
316 return (when() - curTick() + interval - 1) / interval;
317}
318
319const char *
320Intel8254Timer::Counter::CounterEvent::description() const
321{
322 return "Intel 8254 Interval timer";
323}
324
325Tick
326Intel8254Timer::Counter::CounterEvent::getInterval()
327{
328 return interval;
329}
330
| 263 offset = event_tick_offset;
264}
265
266void
267Intel8254Timer::Counter::startup()
268{
269 running = true;
270 if ((period > 0) && (offset > 0))
271 {
272 parent->schedule(event, curTick() + offset);
273 }
274}
275
276Intel8254Timer::Counter::CounterEvent::CounterEvent(Counter* c_ptr)
277{
278 interval = (Tick)(SimClock::Float::s / 1193180.0);
279 counter = c_ptr;
280}
281
282void
283Intel8254Timer::Counter::CounterEvent::process()
284{
285 switch (counter->mode) {
286 case InitTc:
287 counter->output_high = true;
288 break;
289 case RateGen:
290 case SquareWave:
291 setTo(counter->period);
292 break;
293 default:
294 panic("Unimplemented PITimer mode.\n");
295 }
296 counter->parent->counterInterrupt(counter->num);
297}
298
299void
300Intel8254Timer::Counter::CounterEvent::setTo(int clocks)
301{
302 if (clocks == 0)
303 panic("Timer can't be set to go off instantly.\n");
304 DPRINTF(Intel8254Timer, "Timer set to curTick() + %d\n",
305 clocks * interval);
306 counter->parent->schedule(this, curTick() + clocks * interval);
307}
308
309int
310Intel8254Timer::Counter::CounterEvent::clocksLeft()
311{
312 if (!scheduled())
313 return -1;
314 return (when() - curTick() + interval - 1) / interval;
315}
316
317const char *
318Intel8254Timer::Counter::CounterEvent::description() const
319{
320 return "Intel 8254 Interval timer";
321}
322
323Tick
324Intel8254Timer::Counter::CounterEvent::getInterval()
325{
326 return interval;
327}
328
|