1/*
2 * Copyright (c) 2004, 2005
3 * The Regents of The University of Michigan
4 * All Rights Reserved
5 *
6 * This code is part of the M5 simulator.
7 *
8 * Permission is granted to use, copy, create derivative works and

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142 if (event.scheduled())
143 event.deschedule();
144 output_high = false;
145 write_byte = MSB;
146 break;
147
148 case MSB:
149 count = (count & 0x00FF) | (data << 8);
150 period = count;
151
152 if (period > 0) {
153 DPRINTF(Intel8254Timer, "Timer set to curTick + %d\n",
154 count * event.interval);
155 event.schedule(curTick + count * event.interval);
156 }
157 write_byte = LSB;
158 break;
159 }
160}
161
162void
163Intel8254Timer::Counter::setRW(int rw_val)
164{

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235
236void
237Intel8254Timer::Counter::CounterEvent::process()
238{
239 DPRINTF(Intel8254Timer, "Timer Interrupt\n");
240 switch (counter->mode) {
241 case InitTc:
242 counter->output_high = true;
243 case RateGen:
244 case SquareWave:
245 break;
246 default:
247 panic("Unimplemented PITimer mode.\n");
248 }
249}
250
251const char *
252Intel8254Timer::Counter::CounterEvent::description() const
253{
254 return "tsunami 8254 Interval timer";
255}