1/*
2 * Copyright (c) 2004, 2005
3 * The Regents of The University of Michigan
4 * All Rights Reserved
5 *
6 * This code is part of the M5 simulator.
7 *
8 * Permission is granted to use, copy, create derivative works and
9 * redistribute this software and such derivative works for any
10 * purpose, so long as the copyright notice above, this grant of
11 * permission, and the disclaimer below appear in all copies made; and
12 * so long as the name of The University of Michigan is not used in
13 * any advertising or publicity pertaining to the use or distribution
14 * of this software without specific, written prior authorization.
15 *
16 * THIS SOFTWARE IS PROVIDED AS IS, WITHOUT REPRESENTATION FROM THE
17 * UNIVERSITY OF MICHIGAN AS TO ITS FITNESS FOR ANY PURPOSE, AND
18 * WITHOUT WARRANTY BY THE UNIVERSITY OF MICHIGAN OF ANY KIND, EITHER
19 * EXPRESS OR IMPLIED, INCLUDING WITHOUT LIMITATION THE IMPLIED
20 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
21 * PURPOSE. THE REGENTS OF THE UNIVERSITY OF MICHIGAN SHALL NOT BE
22 * LIABLE FOR ANY DAMAGES, INCLUDING DIRECT, SPECIAL, INDIRECT,
23 * INCIDENTAL, OR CONSEQUENTIAL DAMAGES, WITH RESPECT TO ANY CLAIM
24 * ARISING OUT OF OR IN CONNECTION WITH THE USE OF THE SOFTWARE, EVEN
25 * IF IT HAS BEEN OR IS HEREAFTER ADVISED OF THE POSSIBILITY OF SUCH
26 * DAMAGES.
27 *
28 * Authors: Ali G. Saidi
29 * Andrew L. Schultz
30 * Miguel J. Serrano
31 */
32
33#include "base/misc.hh"
34#include "dev/intel_8254_timer.hh"
35
36using namespace std;
37
38Intel8254Timer::Intel8254Timer(EventManager *em, const string &name,
39 Counter *counter0, Counter *counter1, Counter *counter2) :
40 EventManager(em), _name(name)
41{
42 counter[0] = counter0;
43 counter[1] = counter1;
44 counter[2] = counter2;
45}
46
47Intel8254Timer::Intel8254Timer(EventManager *em, const string &name) :
48 EventManager(em), _name(name)
49{
50 counter[0] = new Counter(this, name + ".counter0");
51 counter[1] = new Counter(this, name + ".counter1");
52 counter[2] = new Counter(this, name + ".counter2");
53}
54
55void
56Intel8254Timer::writeControl(const CtrlReg data)
57{
58 int sel = data.sel;
59
60 if (sel == ReadBackCommand)
61 panic("PITimer Read-Back Command is not implemented.\n");
62
63 if (data.rw == LatchCommand)
64 counter[sel]->latchCount();
65 else {
66 counter[sel]->setRW(data.rw);
67 counter[sel]->setMode(data.mode);
68 counter[sel]->setBCD(data.bcd);
69 }
70}
71
72void
73Intel8254Timer::serialize(const string &base, ostream &os)
74{
75 // serialize the counters
76 counter[0]->serialize(base + ".counter0", os);
77 counter[1]->serialize(base + ".counter1", os);
78 counter[2]->serialize(base + ".counter2", os);
79}
80
81void
82Intel8254Timer::unserialize(const string &base, Checkpoint *cp,
83 const string &section)
84{
85 // unserialze the counters
86 counter[0]->unserialize(base + ".counter0", cp, section);
87 counter[1]->unserialize(base + ".counter1", cp, section);
88 counter[2]->unserialize(base + ".counter2", cp, section);
89}
90
91Intel8254Timer::Counter::Counter(Intel8254Timer *p, const string &name)
92 : _name(name), event(this), count(0), latched_count(0), period(0),
93 mode(0), output_high(false), latch_on(false), read_byte(LSB),
94 write_byte(LSB), parent(p)
95{
96
97}
98
99void
100Intel8254Timer::Counter::latchCount()
101{
102 // behave like a real latch
103 if(!latch_on) {
104 latch_on = true;
105 read_byte = LSB;
106 latched_count = count;
107 }
108}
109
110uint8_t
111Intel8254Timer::Counter::read()
112{
113 if (latch_on) {
114 switch (read_byte) {
115 case LSB:
116 read_byte = MSB;
117 return (uint8_t)latched_count;
118 break;
119 case MSB:
120 read_byte = LSB;
121 latch_on = false;
122 return latched_count >> 8;
123 break;
124 default:
125 panic("Shouldn't be here");
126 }
127 } else {
128 switch (read_byte) {
129 case LSB:
130 read_byte = MSB;
131 return (uint8_t)count;
132 break;
133 case MSB:
134 read_byte = LSB;
135 return count >> 8;
136 break;
137 default:
138 panic("Shouldn't be here");
139 }
140 }
141}
142
143void
144Intel8254Timer::Counter::write(const uint8_t data)
145{
146 switch (write_byte) {
147 case LSB:
148 count = (count & 0xFF00) | data;
149
150 if (event.scheduled())
151 parent->deschedule(event);
152 output_high = false;
153 write_byte = MSB;
154 break;
155
156 case MSB:
157 count = (count & 0x00FF) | (data << 8);
158 // In the RateGen or SquareWave modes, the timer wraps around and
159 // triggers on a value of 1, not 0.
160 if (mode == RateGen || mode == SquareWave)
161 period = count - 1;
162 else
163 period = count;
164
165 if (period > 0)
166 event.setTo(period);
167
168 write_byte = LSB;
169 break;
170 }
171}
172
173void
174Intel8254Timer::Counter::setRW(int rw_val)
175{
176 if (rw_val != TwoPhase)
177 panic("Only LSB/MSB read/write is implemented.\n");
178}
179
180void
181Intel8254Timer::Counter::setMode(int mode_val)
182{
183 if(mode_val != InitTc && mode_val != RateGen &&
184 mode_val != SquareWave)
185 panic("PIT mode %#x is not implemented: \n", mode_val);
186
187 mode = mode_val;
188}
189
190void
191Intel8254Timer::Counter::setBCD(int bcd_val)
192{
193 if (bcd_val)
194 panic("PITimer does not implement BCD counts.\n");
195}
196
197bool
198Intel8254Timer::Counter::outputHigh()
199{
200 return output_high;
201}
202
203void
204Intel8254Timer::Counter::serialize(const string &base, ostream &os)
205{
206 paramOut(os, base + ".count", count);
207 paramOut(os, base + ".latched_count", latched_count);
208 paramOut(os, base + ".period", period);
209 paramOut(os, base + ".mode", mode);
210 paramOut(os, base + ".output_high", output_high);
211 paramOut(os, base + ".latch_on", latch_on);
212 paramOut(os, base + ".read_byte", read_byte);
213 paramOut(os, base + ".write_byte", write_byte);
214
215 Tick event_tick = 0;
216 if (event.scheduled())
217 event_tick = event.when();
218 paramOut(os, base + ".event_tick", event_tick);
219}
220
221void
222Intel8254Timer::Counter::unserialize(const string &base, Checkpoint *cp,
223 const string &section)
224{
225 paramIn(cp, section, base + ".count", count);
226 paramIn(cp, section, base + ".latched_count", latched_count);
227 paramIn(cp, section, base + ".period", period);
228 paramIn(cp, section, base + ".mode", mode);
229 paramIn(cp, section, base + ".output_high", output_high);
230 paramIn(cp, section, base + ".latch_on", latch_on);
231 paramIn(cp, section, base + ".read_byte", read_byte);
232 paramIn(cp, section, base + ".write_byte", write_byte);
233
234 Tick event_tick;
235 paramIn(cp, section, base + ".event_tick", event_tick);
236 if (event_tick)
237 parent->schedule(event, event_tick);
238}
239
240Intel8254Timer::Counter::CounterEvent::CounterEvent(Counter* c_ptr)
241{
242 interval = (Tick)(Clock::Float::s / 1193180.0);
243 counter = c_ptr;
244}
245
246void
247Intel8254Timer::Counter::CounterEvent::process()
248{
249 DPRINTF(Intel8254Timer, "Timer Interrupt\n");
250 switch (counter->mode) {
251 case InitTc:
252 counter->output_high = true;
253 break;
254 case RateGen:
255 case SquareWave:
256 setTo(counter->period);
257 break;
258 default:
259 panic("Unimplemented PITimer mode.\n");
260 }
261}
262
263void
264Intel8254Timer::Counter::CounterEvent::setTo(int clocks)
265{
266 if (clocks == 0)
267 panic("Timer can't be set to go off instantly.\n");
268 DPRINTF(Intel8254Timer, "Timer set to curTick + %d\n",
269 clocks * interval);
270 counter->parent->schedule(this, curTick + clocks * interval);
271}
272
273const char *
274Intel8254Timer::Counter::CounterEvent::description() const
275{
276 return "tsunami 8254 Interval timer";
277}