dma_device.hh (11010:034378be28a2) dma_device.hh (11168:f98eb2da15a4)
1/*
2 * Copyright (c) 2012-2013, 2015 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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143
144 DmaPort(MemObject *dev, System *s);
145
146 RequestPtr dmaAction(Packet::Command cmd, Addr addr, int size, Event *event,
147 uint8_t *data, Tick delay, Request::Flags flag = 0);
148
149 bool dmaPending() const { return pendingCount > 0; }
150
1/*
2 * Copyright (c) 2012-2013, 2015 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 134 unchanged lines hidden (view full) ---

143
144 DmaPort(MemObject *dev, System *s);
145
146 RequestPtr dmaAction(Packet::Command cmd, Addr addr, int size, Event *event,
147 uint8_t *data, Tick delay, Request::Flags flag = 0);
148
149 bool dmaPending() const { return pendingCount > 0; }
150
151 DrainState drain() M5_ATTR_OVERRIDE;
151 DrainState drain() override;
152};
153
154class DmaDevice : public PioDevice
155{
156 protected:
157 DmaPort dmaPort;
158
159 public:

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233 DmaReadFifo(DmaPort &port, size_t size,
234 unsigned max_req_size,
235 unsigned max_pending,
236 Request::Flags flags = 0);
237
238 ~DmaReadFifo();
239
240 public: // Serializable
152};
153
154class DmaDevice : public PioDevice
155{
156 protected:
157 DmaPort dmaPort;
158
159 public:

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233 DmaReadFifo(DmaPort &port, size_t size,
234 unsigned max_req_size,
235 unsigned max_pending,
236 Request::Flags flags = 0);
237
238 ~DmaReadFifo();
239
240 public: // Serializable
241 void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE;
242 void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE;
241 void serialize(CheckpointOut &cp) const override;
242 void unserialize(CheckpointIn &cp) override;
243
244 public: // Drainable
243
244 public: // Drainable
245 DrainState drain() M5_ATTR_OVERRIDE;
245 DrainState drain() override;
246
247 public: // FIFO access
248 /**
249 * @{
250 * @name FIFO access
251 */
252 /**
253 * Try to read data from the FIFO.

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247 public: // FIFO access
248 /**
249 * @{
250 * @name FIFO access
251 */
252 /**
253 * Try to read data from the FIFO.

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