1/*
2 * Copyright (c) 2012 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2006 The Regents of The University of Michigan
15 * All rights reserved.
16 *
17 * Redistribution and use in source and binary forms, with or without
18 * modification, are permitted provided that the following conditions are
19 * met: redistributions of source code must retain the above copyright
20 * notice, this list of conditions and the following disclaimer;
21 * redistributions in binary form must reproduce the above copyright
22 * notice, this list of conditions and the following disclaimer in the
23 * documentation and/or other materials provided with the distribution;
24 * neither the name of the copyright holders nor the names of its
25 * contributors may be used to endorse or promote products derived from
26 * this software without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 *
40 * Authors: Ali Saidi
41 * Nathan Binkert
42 */
43
44#include "base/chunk_generator.hh"
45#include "debug/DMA.hh"
| 1/*
2 * Copyright (c) 2012 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2006 The Regents of The University of Michigan
15 * All rights reserved.
16 *
17 * Redistribution and use in source and binary forms, with or without
18 * modification, are permitted provided that the following conditions are
19 * met: redistributions of source code must retain the above copyright
20 * notice, this list of conditions and the following disclaimer;
21 * redistributions in binary form must reproduce the above copyright
22 * notice, this list of conditions and the following disclaimer in the
23 * documentation and/or other materials provided with the distribution;
24 * neither the name of the copyright holders nor the names of its
25 * contributors may be used to endorse or promote products derived from
26 * this software without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 *
40 * Authors: Ali Saidi
41 * Nathan Binkert
42 */
43
44#include "base/chunk_generator.hh"
45#include "debug/DMA.hh"
|
| 46#include "debug/Drain.hh"
|
46#include "dev/dma_device.hh"
47#include "sim/system.hh"
48
49DmaPort::DmaPort(MemObject *dev, System *s, Tick min_backoff, Tick max_backoff)
50 : MasterPort(dev->name() + ".dma", dev), device(dev), sys(s),
51 masterId(s->getMasterId(dev->name())),
52 pendingCount(0), drainEvent(NULL),
53 backoffTime(0), minBackoffDelay(min_backoff),
54 maxBackoffDelay(max_backoff), inRetry(false),
55 backoffEvent(this)
56{ }
57
58bool
59DmaPort::recvTimingResp(PacketPtr pkt)
60{
61 if (pkt->wasNacked()) {
62 DPRINTF(DMA, "Received nacked %s addr %#x\n",
63 pkt->cmdString(), pkt->getAddr());
64
65 if (backoffTime < minBackoffDelay)
66 backoffTime = minBackoffDelay;
67 else if (backoffTime < maxBackoffDelay)
68 backoffTime <<= 1;
69
70 device->reschedule(backoffEvent, curTick() + backoffTime, true);
71
72 DPRINTF(DMA, "Backoff time set to %d ticks\n", backoffTime);
73
74 pkt->reinitNacked();
75 queueDma(pkt, true);
76 } else if (pkt->senderState) {
77 DmaReqState *state;
78 backoffTime >>= 2;
79
80 DPRINTF(DMA, "Received response %s addr %#x size %#x\n",
81 pkt->cmdString(), pkt->getAddr(), pkt->req->getSize());
82 state = dynamic_cast<DmaReqState*>(pkt->senderState);
83 pendingCount--;
84
85 assert(pendingCount >= 0);
86 assert(state);
87
88 // We shouldn't ever get a block in ownership state
89 assert(!(pkt->memInhibitAsserted() && !pkt->sharedAsserted()));
90
91 state->numBytes += pkt->req->getSize();
92 assert(state->totBytes >= state->numBytes);
93 if (state->totBytes == state->numBytes) {
94 if (state->completionEvent) {
95 if (state->delay)
96 device->schedule(state->completionEvent,
97 curTick() + state->delay);
98 else
99 state->completionEvent->process();
100 }
101 delete state;
102 }
103 delete pkt->req;
104 delete pkt;
105
| 47#include "dev/dma_device.hh"
48#include "sim/system.hh"
49
50DmaPort::DmaPort(MemObject *dev, System *s, Tick min_backoff, Tick max_backoff)
51 : MasterPort(dev->name() + ".dma", dev), device(dev), sys(s),
52 masterId(s->getMasterId(dev->name())),
53 pendingCount(0), drainEvent(NULL),
54 backoffTime(0), minBackoffDelay(min_backoff),
55 maxBackoffDelay(max_backoff), inRetry(false),
56 backoffEvent(this)
57{ }
58
59bool
60DmaPort::recvTimingResp(PacketPtr pkt)
61{
62 if (pkt->wasNacked()) {
63 DPRINTF(DMA, "Received nacked %s addr %#x\n",
64 pkt->cmdString(), pkt->getAddr());
65
66 if (backoffTime < minBackoffDelay)
67 backoffTime = minBackoffDelay;
68 else if (backoffTime < maxBackoffDelay)
69 backoffTime <<= 1;
70
71 device->reschedule(backoffEvent, curTick() + backoffTime, true);
72
73 DPRINTF(DMA, "Backoff time set to %d ticks\n", backoffTime);
74
75 pkt->reinitNacked();
76 queueDma(pkt, true);
77 } else if (pkt->senderState) {
78 DmaReqState *state;
79 backoffTime >>= 2;
80
81 DPRINTF(DMA, "Received response %s addr %#x size %#x\n",
82 pkt->cmdString(), pkt->getAddr(), pkt->req->getSize());
83 state = dynamic_cast<DmaReqState*>(pkt->senderState);
84 pendingCount--;
85
86 assert(pendingCount >= 0);
87 assert(state);
88
89 // We shouldn't ever get a block in ownership state
90 assert(!(pkt->memInhibitAsserted() && !pkt->sharedAsserted()));
91
92 state->numBytes += pkt->req->getSize();
93 assert(state->totBytes >= state->numBytes);
94 if (state->totBytes == state->numBytes) {
95 if (state->completionEvent) {
96 if (state->delay)
97 device->schedule(state->completionEvent,
98 curTick() + state->delay);
99 else
100 state->completionEvent->process();
101 }
102 delete state;
103 }
104 delete pkt->req;
105 delete pkt;
106
|
106 if (pendingCount == 0 && drainEvent) {
| 107 if (pendingCount == 0 && transmitList.empty() && drainEvent) {
|
107 drainEvent->process();
108 drainEvent = NULL;
109 }
110 } else {
111 panic("Got packet without sender state... huh?\n");
112 }
113
114 return true;
115}
116
117DmaDevice::DmaDevice(const Params *p)
118 : PioDevice(p), dmaPort(this, sys, params()->min_backoff_delay,
119 params()->max_backoff_delay)
120{ }
121
122void
123DmaDevice::init()
124{
125 if (!dmaPort.isConnected())
126 panic("DMA port of %s not connected to anything!", name());
127 PioDevice::init();
128}
129
130unsigned int
131DmaDevice::drain(Event *de)
132{
133 unsigned int count;
134 count = pioPort.drain(de) + dmaPort.drain(de);
135 if (count)
136 changeState(Draining);
137 else
138 changeState(Drained);
139 return count;
140}
141
142unsigned int
143DmaPort::drain(Event *de)
144{
| 108 drainEvent->process();
109 drainEvent = NULL;
110 }
111 } else {
112 panic("Got packet without sender state... huh?\n");
113 }
114
115 return true;
116}
117
118DmaDevice::DmaDevice(const Params *p)
119 : PioDevice(p), dmaPort(this, sys, params()->min_backoff_delay,
120 params()->max_backoff_delay)
121{ }
122
123void
124DmaDevice::init()
125{
126 if (!dmaPort.isConnected())
127 panic("DMA port of %s not connected to anything!", name());
128 PioDevice::init();
129}
130
131unsigned int
132DmaDevice::drain(Event *de)
133{
134 unsigned int count;
135 count = pioPort.drain(de) + dmaPort.drain(de);
136 if (count)
137 changeState(Draining);
138 else
139 changeState(Drained);
140 return count;
141}
142
143unsigned int
144DmaPort::drain(Event *de)
145{
|
145 if (pendingCount == 0)
| 146 if (transmitList.empty() && pendingCount == 0)
|
146 return 0;
147 drainEvent = de;
| 147 return 0;
148 drainEvent = de;
|
| 149 DPRINTF(Drain, "DmaPort not drained\n");
|
148 return 1;
149}
150
151void
152DmaPort::recvRetry()
153{
154 assert(transmitList.size());
155 bool result = true;
156 do {
157 PacketPtr pkt = transmitList.front();
158 DPRINTF(DMA, "Retry on %s addr %#x\n",
159 pkt->cmdString(), pkt->getAddr());
160 result = sendTimingReq(pkt);
161 if (result) {
162 DPRINTF(DMA, "-- Done\n");
163 transmitList.pop_front();
164 inRetry = false;
165 } else {
166 inRetry = true;
167 DPRINTF(DMA, "-- Failed, queued\n");
168 }
169 } while (!backoffTime && result && transmitList.size());
170
171 if (transmitList.size() && backoffTime && !inRetry) {
172 DPRINTF(DMA, "Scheduling backoff for %d\n", curTick()+backoffTime);
173 if (!backoffEvent.scheduled())
174 device->schedule(backoffEvent, backoffTime + curTick());
175 }
176 DPRINTF(DMA, "TransmitList: %d, backoffTime: %d inRetry: %d es: %d\n",
177 transmitList.size(), backoffTime, inRetry,
178 backoffEvent.scheduled());
179}
180
181void
182DmaPort::dmaAction(Packet::Command cmd, Addr addr, int size, Event *event,
183 uint8_t *data, Tick delay, Request::Flags flag)
184{
| 150 return 1;
151}
152
153void
154DmaPort::recvRetry()
155{
156 assert(transmitList.size());
157 bool result = true;
158 do {
159 PacketPtr pkt = transmitList.front();
160 DPRINTF(DMA, "Retry on %s addr %#x\n",
161 pkt->cmdString(), pkt->getAddr());
162 result = sendTimingReq(pkt);
163 if (result) {
164 DPRINTF(DMA, "-- Done\n");
165 transmitList.pop_front();
166 inRetry = false;
167 } else {
168 inRetry = true;
169 DPRINTF(DMA, "-- Failed, queued\n");
170 }
171 } while (!backoffTime && result && transmitList.size());
172
173 if (transmitList.size() && backoffTime && !inRetry) {
174 DPRINTF(DMA, "Scheduling backoff for %d\n", curTick()+backoffTime);
175 if (!backoffEvent.scheduled())
176 device->schedule(backoffEvent, backoffTime + curTick());
177 }
178 DPRINTF(DMA, "TransmitList: %d, backoffTime: %d inRetry: %d es: %d\n",
179 transmitList.size(), backoffTime, inRetry,
180 backoffEvent.scheduled());
181}
182
183void
184DmaPort::dmaAction(Packet::Command cmd, Addr addr, int size, Event *event,
185 uint8_t *data, Tick delay, Request::Flags flag)
186{
|
185 assert(device->getState() == SimObject::Running);
186
| |
187 DmaReqState *reqState = new DmaReqState(event, size, delay);
188
189
190 DPRINTF(DMA, "Starting DMA for addr: %#x size: %d sched: %d\n", addr, size,
191 event ? event->scheduled() : -1 );
192 for (ChunkGenerator gen(addr, size, peerBlockSize());
193 !gen.done(); gen.next()) {
194 Request *req = new Request(gen.addr(), gen.size(), flag, masterId);
195 PacketPtr pkt = new Packet(req, cmd);
196
197 // Increment the data pointer on a write
198 if (data)
199 pkt->dataStatic(data + gen.complete());
200
201 pkt->senderState = reqState;
202
203 assert(pendingCount >= 0);
204 pendingCount++;
205 DPRINTF(DMA, "--Queuing DMA for addr: %#x size: %d\n", gen.addr(),
206 gen.size());
207 queueDma(pkt);
208 }
209
210}
211
212void
213DmaPort::queueDma(PacketPtr pkt, bool front)
214{
215
216 if (front)
217 transmitList.push_front(pkt);
218 else
219 transmitList.push_back(pkt);
220 sendDma();
221}
222
223void
224DmaPort::sendDma()
225{
226 // some kind of selction between access methods
227 // more work is going to have to be done to make
228 // switching actually work
229 assert(transmitList.size());
230 PacketPtr pkt = transmitList.front();
231
232 Enums::MemoryMode state = sys->getMemoryMode();
233 if (state == Enums::timing) {
234 if (backoffEvent.scheduled() || inRetry) {
235 DPRINTF(DMA, "Can't send immediately, waiting for retry or backoff timer\n");
236 return;
237 }
238
239 DPRINTF(DMA, "Attempting to send %s addr %#x\n",
240 pkt->cmdString(), pkt->getAddr());
241
242 bool result;
243 do {
244 result = sendTimingReq(pkt);
245 if (result) {
246 transmitList.pop_front();
247 DPRINTF(DMA, "-- Done\n");
248 } else {
249 inRetry = true;
250 DPRINTF(DMA, "-- Failed: queued\n");
251 }
252 } while (result && !backoffTime && transmitList.size());
253
254 if (transmitList.size() && backoffTime && !inRetry &&
255 !backoffEvent.scheduled()) {
256 DPRINTF(DMA, "-- Scheduling backoff timer for %d\n",
257 backoffTime+curTick());
258 device->schedule(backoffEvent, backoffTime + curTick());
259 }
260 } else if (state == Enums::atomic) {
261 transmitList.pop_front();
262
263 Tick lat;
264 DPRINTF(DMA, "--Sending DMA for addr: %#x size: %d\n",
265 pkt->req->getPaddr(), pkt->req->getSize());
266 lat = sendAtomic(pkt);
267 assert(pkt->senderState);
268 DmaReqState *state = dynamic_cast<DmaReqState*>(pkt->senderState);
269 assert(state);
270 state->numBytes += pkt->req->getSize();
271
272 DPRINTF(DMA, "--Received response for DMA for addr: %#x size: %d nb: %d, tot: %d sched %d\n",
273 pkt->req->getPaddr(), pkt->req->getSize(), state->numBytes,
274 state->totBytes,
275 state->completionEvent ? state->completionEvent->scheduled() : 0 );
276
277 if (state->totBytes == state->numBytes) {
278 if (state->completionEvent) {
279 assert(!state->completionEvent->scheduled());
280 device->schedule(state->completionEvent,
281 curTick() + lat + state->delay);
282 }
283 delete state;
284 delete pkt->req;
285 }
286 pendingCount--;
287 assert(pendingCount >= 0);
288 delete pkt;
289
| 187 DmaReqState *reqState = new DmaReqState(event, size, delay);
188
189
190 DPRINTF(DMA, "Starting DMA for addr: %#x size: %d sched: %d\n", addr, size,
191 event ? event->scheduled() : -1 );
192 for (ChunkGenerator gen(addr, size, peerBlockSize());
193 !gen.done(); gen.next()) {
194 Request *req = new Request(gen.addr(), gen.size(), flag, masterId);
195 PacketPtr pkt = new Packet(req, cmd);
196
197 // Increment the data pointer on a write
198 if (data)
199 pkt->dataStatic(data + gen.complete());
200
201 pkt->senderState = reqState;
202
203 assert(pendingCount >= 0);
204 pendingCount++;
205 DPRINTF(DMA, "--Queuing DMA for addr: %#x size: %d\n", gen.addr(),
206 gen.size());
207 queueDma(pkt);
208 }
209
210}
211
212void
213DmaPort::queueDma(PacketPtr pkt, bool front)
214{
215
216 if (front)
217 transmitList.push_front(pkt);
218 else
219 transmitList.push_back(pkt);
220 sendDma();
221}
222
223void
224DmaPort::sendDma()
225{
226 // some kind of selction between access methods
227 // more work is going to have to be done to make
228 // switching actually work
229 assert(transmitList.size());
230 PacketPtr pkt = transmitList.front();
231
232 Enums::MemoryMode state = sys->getMemoryMode();
233 if (state == Enums::timing) {
234 if (backoffEvent.scheduled() || inRetry) {
235 DPRINTF(DMA, "Can't send immediately, waiting for retry or backoff timer\n");
236 return;
237 }
238
239 DPRINTF(DMA, "Attempting to send %s addr %#x\n",
240 pkt->cmdString(), pkt->getAddr());
241
242 bool result;
243 do {
244 result = sendTimingReq(pkt);
245 if (result) {
246 transmitList.pop_front();
247 DPRINTF(DMA, "-- Done\n");
248 } else {
249 inRetry = true;
250 DPRINTF(DMA, "-- Failed: queued\n");
251 }
252 } while (result && !backoffTime && transmitList.size());
253
254 if (transmitList.size() && backoffTime && !inRetry &&
255 !backoffEvent.scheduled()) {
256 DPRINTF(DMA, "-- Scheduling backoff timer for %d\n",
257 backoffTime+curTick());
258 device->schedule(backoffEvent, backoffTime + curTick());
259 }
260 } else if (state == Enums::atomic) {
261 transmitList.pop_front();
262
263 Tick lat;
264 DPRINTF(DMA, "--Sending DMA for addr: %#x size: %d\n",
265 pkt->req->getPaddr(), pkt->req->getSize());
266 lat = sendAtomic(pkt);
267 assert(pkt->senderState);
268 DmaReqState *state = dynamic_cast<DmaReqState*>(pkt->senderState);
269 assert(state);
270 state->numBytes += pkt->req->getSize();
271
272 DPRINTF(DMA, "--Received response for DMA for addr: %#x size: %d nb: %d, tot: %d sched %d\n",
273 pkt->req->getPaddr(), pkt->req->getSize(), state->numBytes,
274 state->totBytes,
275 state->completionEvent ? state->completionEvent->scheduled() : 0 );
276
277 if (state->totBytes == state->numBytes) {
278 if (state->completionEvent) {
279 assert(!state->completionEvent->scheduled());
280 device->schedule(state->completionEvent,
281 curTick() + lat + state->delay);
282 }
283 delete state;
284 delete pkt->req;
285 }
286 pendingCount--;
287 assert(pendingCount >= 0);
288 delete pkt;
289
|
290 if (pendingCount == 0 && drainEvent) {
| 290 if (pendingCount == 0 && transmitList.empty() && drainEvent) {
291 DPRINTF(Drain, "DmaPort done draining, processing drain event\n");
|
291 drainEvent->process();
292 drainEvent = NULL;
293 }
294
295 } else
296 panic("Unknown memory command state.");
297}
298
299DmaDevice::~DmaDevice()
300{
301}
302
303MasterPort &
304DmaDevice::getMasterPort(const std::string &if_name, int idx)
305{
306 if (if_name == "dma") {
307 return dmaPort;
308 }
309 return PioDevice::getMasterPort(if_name, idx);
310}
| 292 drainEvent->process();
293 drainEvent = NULL;
294 }
295
296 } else
297 panic("Unknown memory command state.");
298}
299
300DmaDevice::~DmaDevice()
301{
302}
303
304MasterPort &
305DmaDevice::getMasterPort(const std::string &if_name, int idx)
306{
307 if (if_name == "dma") {
308 return dmaPort;
309 }
310 return PioDevice::getMasterPort(if_name, idx);
311}
|