vgic.hh (12092:9bb326b4661d) vgic.hh (12132:559e67bd19dc)
1/*
2 * Copyright (c) 2013 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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99 static const int GICV_AHPPIR = 0x028;
100 static const int GICV_APR0 = 0x0d0;
101 static const int GICV_IIDR = 0x0fc;
102 static const int GICV_DIR = 0x1000;
103
104 static const uint32_t LR_PENDING = 1;
105 static const uint32_t LR_ACTIVE = 2;
106
1/*
2 * Copyright (c) 2013 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 90 unchanged lines hidden (view full) ---

99 static const int GICV_AHPPIR = 0x028;
100 static const int GICV_APR0 = 0x0d0;
101 static const int GICV_IIDR = 0x0fc;
102 static const int GICV_DIR = 0x1000;
103
104 static const uint32_t LR_PENDING = 1;
105 static const uint32_t LR_ACTIVE = 2;
106
107 /** Event definition to post interrupt to CPU after a delay
108 */
109 class PostVIntEvent : public Event
110 {
111 private:
112 uint32_t cpu;
113 Platform *platform;
114 public:
115 PostVIntEvent( uint32_t c, Platform* p)
116 : cpu(c), platform(p)
117 { }
118 void process() { platform->intrctrl->post(cpu, ArmISA::INT_VIRT_IRQ, 0);}
119 const char *description() const { return "Post VInterrupt to CPU"; }
120 };
107 /** Post interrupt to CPU */
108 void processPostVIntEvent(uint32_t cpu);
121
109
122 PostVIntEvent *postVIntEvent[VGIC_CPU_MAX];
110 EventFunctionWrapper *postVIntEvent[VGIC_CPU_MAX];
123 bool maintIntPosted[VGIC_CPU_MAX];
124 bool vIntPosted[VGIC_CPU_MAX];
125
126 Platform *platform;
127 BaseGic *gic;
128
129 Addr vcpuAddr;
130 Addr hvAddr;

--- 148 unchanged lines hidden --- 		111 bool maintIntPosted[VGIC_CPU_MAX];
112 bool vIntPosted[VGIC_CPU_MAX];
113
114 Platform *platform;
115 BaseGic *gic;
116
117 Addr vcpuAddr;
118 Addr hvAddr;

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