vgic.cc (12092:9bb326b4661d) vgic.cc (12132:559e67bd19dc)
1/*
2 * Copyright (c) 2013 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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48#include "mem/packet_access.hh"
49
50VGic::VGic(const Params *p)
51 : PioDevice(p), platform(p->platform), gic(p->gic), vcpuAddr(p->vcpu_addr),
52 hvAddr(p->hv_addr), pioDelay(p->pio_delay),
53 maintInt(p->ppint)
54{
55 for (int x = 0; x < VGIC_CPU_MAX; x++) {
1/*
2 * Copyright (c) 2013 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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48#include "mem/packet_access.hh"
49
50VGic::VGic(const Params *p)
51 : PioDevice(p), platform(p->platform), gic(p->gic), vcpuAddr(p->vcpu_addr),
52 hvAddr(p->hv_addr), pioDelay(p->pio_delay),
53 maintInt(p->ppint)
54{
55 for (int x = 0; x < VGIC_CPU_MAX; x++) {
56 postVIntEvent[x] = new PostVIntEvent(x, p->platform);
56 postVIntEvent[x] = new EventFunctionWrapper(
57 [this, x]{ processPostVIntEvent(x); },
58 "Post VInterrupt to CPU");
57 maintIntPosted[x] = false;
58 vIntPosted[x] = false;
59 }
60 assert(sys->numRunningContexts() <= VGIC_CPU_MAX);
61}
62
63VGic::~VGic()
64{

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364void
365VGic::unPostVInt(uint32_t cpu)
366{
367 DPRINTF(VGIC, "Unposting VIRQ to %d\n", cpu);
368 platform->intrctrl->clear(cpu, ArmISA::INT_VIRT_IRQ, 0);
369}
370
371void
59 maintIntPosted[x] = false;
60 vIntPosted[x] = false;
61 }
62 assert(sys->numRunningContexts() <= VGIC_CPU_MAX);
63}
64
65VGic::~VGic()
66{

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366void
367VGic::unPostVInt(uint32_t cpu)
368{
369 DPRINTF(VGIC, "Unposting VIRQ to %d\n", cpu);
370 platform->intrctrl->clear(cpu, ArmISA::INT_VIRT_IRQ, 0);
371}
372
373void
374VGic::processPostVIntEvent(uint32_t cpu)
375{
376 platform->intrctrl->post(cpu, ArmISA::INT_VIRT_IRQ, 0);
377}
378
379
380void
372VGic::postMaintInt(uint32_t cpu)
373{
374 DPRINTF(VGIC, "Posting maintenance PPI to GIC/cpu%d\n", cpu);
375 // Linux DT configures this as Level.
376 gic->sendPPInt(maintInt, cpu);
377}
378
379void

--- 168 unchanged lines hidden --- 		381VGic::postMaintInt(uint32_t cpu)
382{
383 DPRINTF(VGIC, "Posting maintenance PPI to GIC/cpu%d\n", cpu);
384 // Linux DT configures this as Level.
385 gic->sendPPInt(maintInt, cpu);
386}
387
388void

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