1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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47 * This implements the dual Sp804 timer block
48 */
49
50class BaseGic;
51
52class Sp804 : public AmbaPioDevice
53{
54 protected:
55 class Timer : public Serializable
56 {
57
58 public:
59 enum {
60 LoadReg = 0x00,
61 CurrentReg = 0x04,
62 ControlReg = 0x08,
63 IntClear = 0x0C,

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116 std::string name() const { return _name; }
117
118 /** Handle read for a single timer */
119 void read(PacketPtr pkt, Addr daddr);
120
121 /** Handle write for a single timer */
122 void write(PacketPtr pkt, Addr daddr);
123
124 void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE;
125 void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE;
126 };
127
128 /** Pointer to the GIC for causing an interrupt */
129 BaseGic *gic;
130
131 /** Timers that do the actual work */
132 Timer timer0;
133 Timer timer1;

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155 /**
156 * All writes are simply ignored.
157 * @param pkt The memory request.
158 * @param data the data
159 */
160 virtual Tick write(PacketPtr pkt);
161
162
163 void serialize(CheckpointOut &cp) const M5_ATTR_OVERRIDE;
164 void unserialize(CheckpointIn &cp) M5_ATTR_OVERRIDE;
165};
166
167
168#endif // __DEV_ARM_SP804_HH__
169