timer_sp804.cc (9808:13ffc0066b76) | timer_sp804.cc (10565:23593fdaadcd) |
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1/* 2 * Copyright (c) 2010 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated 11 * unmodified and in its entirety in all distributions of the software, 12 * modified or unmodified, in source code or in binary form. 13 * 14 * Redistribution and use in source and binary forms, with or without 15 * modification, are permitted provided that the following conditions are 16 * met: redistributions of source code must retain the above copyright 17 * notice, this list of conditions and the following disclaimer; 18 * redistributions in binary form must reproduce the above copyright 19 * notice, this list of conditions and the following disclaimer in the 20 * documentation and/or other materials provided with the distribution; 21 * neither the name of the copyright holders nor the names of its 22 * contributors may be used to endorse or promote products derived from 23 * this software without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 36 * 37 * Authors: Ali Saidi 38 */ 39 40#include "base/intmath.hh" 41#include "base/trace.hh" 42#include "debug/Checkpoint.hh" 43#include "debug/Timer.hh" 44#include "dev/arm/base_gic.hh" 45#include "dev/arm/timer_sp804.hh" 46#include "mem/packet.hh" 47#include "mem/packet_access.hh" 48 49Sp804::Sp804(Params *p) 50 : AmbaPioDevice(p, 0xfff), gic(p->gic), 51 timer0(name() + ".timer0", this, p->int_num0, p->clock0), 52 timer1(name() + ".timer1", this, p->int_num1, p->clock1) 53{ 54} 55 56Sp804::Timer::Timer(std::string __name, Sp804 *_parent, int int_num, Tick _clock) 57 : _name(__name), parent(_parent), intNum(int_num), clock(_clock), control(0x20), 58 rawInt(false), pendingInt(false), loadValue(0xffffffff), zeroEvent(this) 59{ 60} 61 62 63Tick 64Sp804::read(PacketPtr pkt) 65{ 66 assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize); 67 assert(pkt->getSize() == 4); 68 Addr daddr = pkt->getAddr() - pioAddr; | 1/* 2 * Copyright (c) 2010 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated 11 * unmodified and in its entirety in all distributions of the software, 12 * modified or unmodified, in source code or in binary form. 13 * 14 * Redistribution and use in source and binary forms, with or without 15 * modification, are permitted provided that the following conditions are 16 * met: redistributions of source code must retain the above copyright 17 * notice, this list of conditions and the following disclaimer; 18 * redistributions in binary form must reproduce the above copyright 19 * notice, this list of conditions and the following disclaimer in the 20 * documentation and/or other materials provided with the distribution; 21 * neither the name of the copyright holders nor the names of its 22 * contributors may be used to endorse or promote products derived from 23 * this software without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 36 * 37 * Authors: Ali Saidi 38 */ 39 40#include "base/intmath.hh" 41#include "base/trace.hh" 42#include "debug/Checkpoint.hh" 43#include "debug/Timer.hh" 44#include "dev/arm/base_gic.hh" 45#include "dev/arm/timer_sp804.hh" 46#include "mem/packet.hh" 47#include "mem/packet_access.hh" 48 49Sp804::Sp804(Params *p) 50 : AmbaPioDevice(p, 0xfff), gic(p->gic), 51 timer0(name() + ".timer0", this, p->int_num0, p->clock0), 52 timer1(name() + ".timer1", this, p->int_num1, p->clock1) 53{ 54} 55 56Sp804::Timer::Timer(std::string __name, Sp804 *_parent, int int_num, Tick _clock) 57 : _name(__name), parent(_parent), intNum(int_num), clock(_clock), control(0x20), 58 rawInt(false), pendingInt(false), loadValue(0xffffffff), zeroEvent(this) 59{ 60} 61 62 63Tick 64Sp804::read(PacketPtr pkt) 65{ 66 assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize); 67 assert(pkt->getSize() == 4); 68 Addr daddr = pkt->getAddr() - pioAddr; |
69 pkt->allocate(); | |
70 DPRINTF(Timer, "Reading from DualTimer at offset: %#x\n", daddr); 71 72 if (daddr < Timer::Size) 73 timer0.read(pkt, daddr); 74 else if ((daddr - Timer::Size) < Timer::Size) 75 timer1.read(pkt, daddr - Timer::Size); 76 else if (!readId(pkt, ambaId, pioAddr)) 77 panic("Tried to read SP804 at offset %#x that doesn't exist\n", daddr); 78 pkt->makeAtomicResponse(); 79 return pioDelay; 80} 81 82 83void 84Sp804::Timer::read(PacketPtr pkt, Addr daddr) 85{ 86 switch(daddr) { 87 case LoadReg: 88 pkt->set<uint32_t>(loadValue); 89 break; 90 case CurrentReg: 91 DPRINTF(Timer, "Event schedule for %d, clock=%d, prescale=%d\n", 92 zeroEvent.when(), clock, control.timerPrescale); 93 Tick time; 94 time = zeroEvent.when() - curTick(); 95 time = time / clock / power(16, control.timerPrescale); 96 DPRINTF(Timer, "-- returning counter at %d\n", time); 97 pkt->set<uint32_t>(time); 98 break; 99 case ControlReg: 100 pkt->set<uint32_t>(control); 101 break; 102 case RawISR: 103 pkt->set<uint32_t>(rawInt); 104 break; 105 case MaskedISR: 106 pkt->set<uint32_t>(pendingInt); 107 break; 108 case BGLoad: 109 pkt->set<uint32_t>(loadValue); 110 break; 111 default: 112 panic("Tried to read SP804 timer at offset %#x\n", daddr); 113 break; 114 } 115 DPRINTF(Timer, "Reading %#x from Timer at offset: %#x\n", pkt->get<uint32_t>(), daddr); 116} 117 118Tick 119Sp804::write(PacketPtr pkt) 120{ 121 assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize); 122 assert(pkt->getSize() == 4); 123 Addr daddr = pkt->getAddr() - pioAddr; | 69 DPRINTF(Timer, "Reading from DualTimer at offset: %#x\n", daddr); 70 71 if (daddr < Timer::Size) 72 timer0.read(pkt, daddr); 73 else if ((daddr - Timer::Size) < Timer::Size) 74 timer1.read(pkt, daddr - Timer::Size); 75 else if (!readId(pkt, ambaId, pioAddr)) 76 panic("Tried to read SP804 at offset %#x that doesn't exist\n", daddr); 77 pkt->makeAtomicResponse(); 78 return pioDelay; 79} 80 81 82void 83Sp804::Timer::read(PacketPtr pkt, Addr daddr) 84{ 85 switch(daddr) { 86 case LoadReg: 87 pkt->set<uint32_t>(loadValue); 88 break; 89 case CurrentReg: 90 DPRINTF(Timer, "Event schedule for %d, clock=%d, prescale=%d\n", 91 zeroEvent.when(), clock, control.timerPrescale); 92 Tick time; 93 time = zeroEvent.when() - curTick(); 94 time = time / clock / power(16, control.timerPrescale); 95 DPRINTF(Timer, "-- returning counter at %d\n", time); 96 pkt->set<uint32_t>(time); 97 break; 98 case ControlReg: 99 pkt->set<uint32_t>(control); 100 break; 101 case RawISR: 102 pkt->set<uint32_t>(rawInt); 103 break; 104 case MaskedISR: 105 pkt->set<uint32_t>(pendingInt); 106 break; 107 case BGLoad: 108 pkt->set<uint32_t>(loadValue); 109 break; 110 default: 111 panic("Tried to read SP804 timer at offset %#x\n", daddr); 112 break; 113 } 114 DPRINTF(Timer, "Reading %#x from Timer at offset: %#x\n", pkt->get<uint32_t>(), daddr); 115} 116 117Tick 118Sp804::write(PacketPtr pkt) 119{ 120 assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize); 121 assert(pkt->getSize() == 4); 122 Addr daddr = pkt->getAddr() - pioAddr; |
124 pkt->allocate(); | |
125 DPRINTF(Timer, "Writing to DualTimer at offset: %#x\n", daddr); 126 127 if (daddr < Timer::Size) 128 timer0.write(pkt, daddr); 129 else if ((daddr - Timer::Size) < Timer::Size) 130 timer1.write(pkt, daddr - Timer::Size); 131 else if (!readId(pkt, ambaId, pioAddr)) 132 panic("Tried to write SP804 at offset %#x that doesn't exist\n", daddr); 133 pkt->makeAtomicResponse(); 134 return pioDelay; 135} 136 137void 138Sp804::Timer::write(PacketPtr pkt, Addr daddr) 139{ 140 DPRINTF(Timer, "Writing %#x to Timer at offset: %#x\n", pkt->get<uint32_t>(), daddr); 141 switch (daddr) { 142 case LoadReg: 143 loadValue = pkt->get<uint32_t>(); 144 restartCounter(loadValue); 145 break; 146 case CurrentReg: 147 // Spec says this value can't be written, but linux writes it anyway 148 break; 149 case ControlReg: 150 bool old_enable; 151 old_enable = control.timerEnable; 152 control = pkt->get<uint32_t>(); 153 if ((old_enable == 0) && control.timerEnable) 154 restartCounter(loadValue); 155 break; 156 case IntClear: 157 rawInt = false; 158 if (pendingInt) { 159 pendingInt = false; 160 DPRINTF(Timer, "Clearing interrupt\n"); 161 parent->gic->clearInt(intNum); 162 } 163 break; 164 case BGLoad: 165 loadValue = pkt->get<uint32_t>(); 166 break; 167 default: 168 panic("Tried to write SP804 timer at offset %#x\n", daddr); 169 break; 170 } 171} 172 173void 174Sp804::Timer::restartCounter(uint32_t val) 175{ 176 DPRINTF(Timer, "Resetting counter with value %#x\n", val); 177 if (!control.timerEnable) 178 return; 179 180 Tick time = clock * power(16, control.timerPrescale); 181 if (control.timerSize) 182 time *= val; 183 else 184 time *= bits(val,15,0); 185 186 if (zeroEvent.scheduled()) { 187 DPRINTF(Timer, "-- Event was already schedule, de-scheduling\n"); 188 parent->deschedule(zeroEvent); 189 } 190 parent->schedule(zeroEvent, curTick() + time); 191 DPRINTF(Timer, "-- Scheduling new event for: %d\n", curTick() + time); 192} 193 194void 195Sp804::Timer::counterAtZero() 196{ 197 if (!control.timerEnable) 198 return; 199 200 DPRINTF(Timer, "Counter reached zero\n"); 201 202 rawInt = true; 203 bool old_pending = pendingInt; 204 if (control.intEnable) 205 pendingInt = true; 206 if (pendingInt && !old_pending) { 207 DPRINTF(Timer, "-- Causing interrupt\n"); 208 parent->gic->sendInt(intNum); 209 } 210 211 if (control.oneShot) 212 return; 213 214 // Free-running 215 if (control.timerMode == 0) 216 restartCounter(0xffffffff); 217 else 218 restartCounter(loadValue); 219} 220 221void 222Sp804::Timer::serialize(std::ostream &os) 223{ 224 DPRINTF(Checkpoint, "Serializing Arm Sp804\n"); 225 226 uint32_t control_serial = control; 227 SERIALIZE_SCALAR(control_serial); 228 229 SERIALIZE_SCALAR(rawInt); 230 SERIALIZE_SCALAR(pendingInt); 231 SERIALIZE_SCALAR(loadValue); 232 233 bool is_in_event = zeroEvent.scheduled(); 234 SERIALIZE_SCALAR(is_in_event); 235 236 Tick event_time; 237 if (is_in_event){ 238 event_time = zeroEvent.when(); 239 SERIALIZE_SCALAR(event_time); 240 } 241} 242 243void 244Sp804::Timer::unserialize(Checkpoint *cp, const std::string §ion) 245{ 246 DPRINTF(Checkpoint, "Unserializing Arm Sp804\n"); 247 248 uint32_t control_serial; 249 UNSERIALIZE_SCALAR(control_serial); 250 control = control_serial; 251 252 UNSERIALIZE_SCALAR(rawInt); 253 UNSERIALIZE_SCALAR(pendingInt); 254 UNSERIALIZE_SCALAR(loadValue); 255 256 bool is_in_event; 257 UNSERIALIZE_SCALAR(is_in_event); 258 259 Tick event_time; 260 if (is_in_event){ 261 UNSERIALIZE_SCALAR(event_time); 262 parent->schedule(zeroEvent, event_time); 263 } 264} 265 266 267 268void 269Sp804::serialize(std::ostream &os) 270{ 271 nameOut(os, csprintf("%s.timer0", name())); 272 timer0.serialize(os); 273 nameOut(os, csprintf("%s.timer1", name())); 274 timer1.serialize(os); 275} 276 277void 278Sp804::unserialize(Checkpoint *cp, const std::string §ion) 279{ 280 timer0.unserialize(cp, csprintf("%s.timer0", section)); 281 timer1.unserialize(cp, csprintf("%s.timer1", section)); 282} 283 284Sp804 * 285Sp804Params::create() 286{ 287 return new Sp804(this); 288} | 123 DPRINTF(Timer, "Writing to DualTimer at offset: %#x\n", daddr); 124 125 if (daddr < Timer::Size) 126 timer0.write(pkt, daddr); 127 else if ((daddr - Timer::Size) < Timer::Size) 128 timer1.write(pkt, daddr - Timer::Size); 129 else if (!readId(pkt, ambaId, pioAddr)) 130 panic("Tried to write SP804 at offset %#x that doesn't exist\n", daddr); 131 pkt->makeAtomicResponse(); 132 return pioDelay; 133} 134 135void 136Sp804::Timer::write(PacketPtr pkt, Addr daddr) 137{ 138 DPRINTF(Timer, "Writing %#x to Timer at offset: %#x\n", pkt->get<uint32_t>(), daddr); 139 switch (daddr) { 140 case LoadReg: 141 loadValue = pkt->get<uint32_t>(); 142 restartCounter(loadValue); 143 break; 144 case CurrentReg: 145 // Spec says this value can't be written, but linux writes it anyway 146 break; 147 case ControlReg: 148 bool old_enable; 149 old_enable = control.timerEnable; 150 control = pkt->get<uint32_t>(); 151 if ((old_enable == 0) && control.timerEnable) 152 restartCounter(loadValue); 153 break; 154 case IntClear: 155 rawInt = false; 156 if (pendingInt) { 157 pendingInt = false; 158 DPRINTF(Timer, "Clearing interrupt\n"); 159 parent->gic->clearInt(intNum); 160 } 161 break; 162 case BGLoad: 163 loadValue = pkt->get<uint32_t>(); 164 break; 165 default: 166 panic("Tried to write SP804 timer at offset %#x\n", daddr); 167 break; 168 } 169} 170 171void 172Sp804::Timer::restartCounter(uint32_t val) 173{ 174 DPRINTF(Timer, "Resetting counter with value %#x\n", val); 175 if (!control.timerEnable) 176 return; 177 178 Tick time = clock * power(16, control.timerPrescale); 179 if (control.timerSize) 180 time *= val; 181 else 182 time *= bits(val,15,0); 183 184 if (zeroEvent.scheduled()) { 185 DPRINTF(Timer, "-- Event was already schedule, de-scheduling\n"); 186 parent->deschedule(zeroEvent); 187 } 188 parent->schedule(zeroEvent, curTick() + time); 189 DPRINTF(Timer, "-- Scheduling new event for: %d\n", curTick() + time); 190} 191 192void 193Sp804::Timer::counterAtZero() 194{ 195 if (!control.timerEnable) 196 return; 197 198 DPRINTF(Timer, "Counter reached zero\n"); 199 200 rawInt = true; 201 bool old_pending = pendingInt; 202 if (control.intEnable) 203 pendingInt = true; 204 if (pendingInt && !old_pending) { 205 DPRINTF(Timer, "-- Causing interrupt\n"); 206 parent->gic->sendInt(intNum); 207 } 208 209 if (control.oneShot) 210 return; 211 212 // Free-running 213 if (control.timerMode == 0) 214 restartCounter(0xffffffff); 215 else 216 restartCounter(loadValue); 217} 218 219void 220Sp804::Timer::serialize(std::ostream &os) 221{ 222 DPRINTF(Checkpoint, "Serializing Arm Sp804\n"); 223 224 uint32_t control_serial = control; 225 SERIALIZE_SCALAR(control_serial); 226 227 SERIALIZE_SCALAR(rawInt); 228 SERIALIZE_SCALAR(pendingInt); 229 SERIALIZE_SCALAR(loadValue); 230 231 bool is_in_event = zeroEvent.scheduled(); 232 SERIALIZE_SCALAR(is_in_event); 233 234 Tick event_time; 235 if (is_in_event){ 236 event_time = zeroEvent.when(); 237 SERIALIZE_SCALAR(event_time); 238 } 239} 240 241void 242Sp804::Timer::unserialize(Checkpoint *cp, const std::string §ion) 243{ 244 DPRINTF(Checkpoint, "Unserializing Arm Sp804\n"); 245 246 uint32_t control_serial; 247 UNSERIALIZE_SCALAR(control_serial); 248 control = control_serial; 249 250 UNSERIALIZE_SCALAR(rawInt); 251 UNSERIALIZE_SCALAR(pendingInt); 252 UNSERIALIZE_SCALAR(loadValue); 253 254 bool is_in_event; 255 UNSERIALIZE_SCALAR(is_in_event); 256 257 Tick event_time; 258 if (is_in_event){ 259 UNSERIALIZE_SCALAR(event_time); 260 parent->schedule(zeroEvent, event_time); 261 } 262} 263 264 265 266void 267Sp804::serialize(std::ostream &os) 268{ 269 nameOut(os, csprintf("%s.timer0", name())); 270 timer0.serialize(os); 271 nameOut(os, csprintf("%s.timer1", name())); 272 timer1.serialize(os); 273} 274 275void 276Sp804::unserialize(Checkpoint *cp, const std::string §ion) 277{ 278 timer0.unserialize(cp, csprintf("%s.timer0", section)); 279 timer1.unserialize(cp, csprintf("%s.timer1", section)); 280} 281 282Sp804 * 283Sp804Params::create() 284{ 285 return new Sp804(this); 286} |