1/* 2 * Copyright (c) 2010-2011 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated 11 * unmodified and in its entirety in all distributions of the software, 12 * modified or unmodified, in source code or in binary form. 13 * 14 * Redistribution and use in source and binary forms, with or without 15 * modification, are permitted provided that the following conditions are 16 * met: redistributions of source code must retain the above copyright 17 * notice, this list of conditions and the following disclaimer; 18 * redistributions in binary form must reproduce the above copyright 19 * notice, this list of conditions and the following disclaimer in the 20 * documentation and/or other materials provided with the distribution; 21 * neither the name of the copyright holders nor the names of its 22 * contributors may be used to endorse or promote products derived from 23 * this software without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 36 * 37 * Authors: Ali Saidi 38 * Geoffrey Blake 39 */ 40 41#ifndef __DEV_ARM_LOCALTIMER_HH__ 42#define __DEV_ARM_LOCALTIMER_HH__ 43 |
44#include "dev/io_device.hh" 45#include "params/CpuLocalTimer.hh" 46 47/** @file 48 * This implements the cpu local timer from the Cortex-A9 MPCore 49 * Technical Reference Manual rev r2p2 (ARM DDI 0407F) 50 */ 51 52class Gic; 53 54class CpuLocalTimer : public BasicPioDevice 55{ 56 protected: 57 class Timer 58 { 59 60 public: 61 enum { 62 TimerLoadReg = 0x00, 63 TimerCounterReg = 0x04, 64 TimerControlReg = 0x08, 65 TimerIntStatusReg = 0x0C, 66 WatchdogLoadReg = 0x20, 67 WatchdogCounterReg = 0x24, 68 WatchdogControlReg = 0x28, 69 WatchdogIntStatusReg = 0x2C, 70 WatchdogResetStatusReg = 0x30, 71 WatchdogDisableReg = 0x34, 72 Size = 0x38 73 }; 74 75 BitUnion32(TimerCtrl) 76 Bitfield<0> enable; 77 Bitfield<1> autoReload; 78 Bitfield<2> intEnable; 79 Bitfield<7,3> reserved; 80 Bitfield<15,8> prescalar; 81 EndBitUnion(TimerCtrl) 82 83 BitUnion32(WatchdogCtrl) 84 Bitfield<0> enable; 85 Bitfield<1> autoReload; 86 Bitfield<2> intEnable; 87 Bitfield<3> watchdogMode; 88 Bitfield<7,4> reserved; 89 Bitfield<15,8> prescalar; 90 EndBitUnion(WatchdogCtrl) 91 92 protected: 93 std::string _name; 94 95 /** Pointer to parent class */ 96 CpuLocalTimer *parent; 97 98 /** Number of interrupt to cause/clear */ 99 uint32_t intNumTimer; 100 uint32_t intNumWatchdog; 101 102 /** Cpu this timer is attached to */ 103 uint32_t cpuNum; 104 105 /** Number of ticks in a clock input */ 106 Tick clock; 107 108 /** Control register as specified above */ 109 TimerCtrl timerControl; 110 WatchdogCtrl watchdogControl; 111 112 /** If timer has caused an interrupt. This is irrespective of 113 * interrupt enable */ 114 bool rawIntTimer; 115 bool rawIntWatchdog; 116 bool rawResetWatchdog; 117 uint32_t watchdogDisableReg; 118 119 /** If an interrupt is currently pending. Logical and of Timer or 120 * Watchdog Ctrl.enable and rawIntTimer or rawIntWatchdog */ 121 bool pendingIntTimer; 122 bool pendingIntWatchdog; 123 124 /** Value to load into counters when periodic mode reaches 0 */ 125 uint32_t timerLoadValue; 126 uint32_t watchdogLoadValue; 127 128 /** Called when the counter reaches 0 */ 129 void timerAtZero(); 130 EventWrapper<Timer, &Timer::timerAtZero> timerZeroEvent; 131 132 void watchdogAtZero(); 133 EventWrapper<Timer, &Timer::watchdogAtZero> watchdogZeroEvent; 134 public: 135 /** Restart the counter ticking at val 136 * @param val the value to start at */ 137 void restartTimerCounter(uint32_t val); 138 void restartWatchdogCounter(uint32_t val); 139 140 Timer(); 141 142 std::string name() const { return _name; } 143 144 /** Handle read for a single timer */ 145 void read(PacketPtr pkt, Addr daddr); 146 147 /** Handle write for a single timer */ 148 void write(PacketPtr pkt, Addr daddr); 149 150 void serialize(std::ostream &os); 151 void unserialize(Checkpoint *cp, const std::string §ion); 152 153 friend class CpuLocalTimer; 154 }; 155 156 static const int CPU_MAX = 8; 157 158 /** Pointer to the GIC for causing an interrupt */ 159 Gic *gic; 160 161 /** Timers that do the actual work */ 162 Timer localTimer[CPU_MAX]; 163 164 public: 165 typedef CpuLocalTimerParams Params; 166 const Params * 167 params() const 168 { 169 return dynamic_cast<const Params *>(_params); 170 } 171 /** 172 * The constructor for RealView just registers itself with the MMU. 173 * @param p params structure 174 */ 175 CpuLocalTimer(Params *p); 176 177 /** 178 * Handle a read to the device 179 * @param pkt The memory request. 180 * @return Returns latency of device read 181 */ 182 virtual Tick read(PacketPtr pkt); 183 184 /** 185 * Handle a write to the device. 186 * @param pkt The memory request. 187 * @return Returns latency of device write 188 */ 189 virtual Tick write(PacketPtr pkt); 190 191 192 virtual void serialize(std::ostream &os); 193 virtual void unserialize(Checkpoint *cp, const std::string §ion); 194}; 195 196 197#endif // __DEV_ARM_SP804_HH__ 198 |