timer_cpulocal.cc (13106:3af014b59080) timer_cpulocal.cc (13230:2988dc5d1d6f)
1/*
2 * Copyright (c) 2010-2013,2018 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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111void
112CpuLocalTimer::Timer::read(PacketPtr pkt, Addr daddr)
113{
114 DPRINTF(Timer, "Reading from CpuLocalTimer at offset: %#x\n", daddr);
115 Tick time;
116
117 switch(daddr) {
118 case TimerLoadReg:
1/*
2 * Copyright (c) 2010-2013,2018 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 102 unchanged lines hidden (view full) ---

111void
112CpuLocalTimer::Timer::read(PacketPtr pkt, Addr daddr)
113{
114 DPRINTF(Timer, "Reading from CpuLocalTimer at offset: %#x\n", daddr);
115 Tick time;
116
117 switch(daddr) {
118 case TimerLoadReg:
119 pkt->set(timerLoadValue);
119 pkt->setLE<uint32_t>(timerLoadValue);
120 break;
121 case TimerCounterReg:
122 DPRINTF(Timer, "Event schedule for timer %d, clock=%d, prescale=%d\n",
123 timerZeroEvent.when(), parent->clockPeriod(),
124 timerControl.prescalar);
125 time = timerZeroEvent.when() - curTick();
126 time = time / parent->clockPeriod() /
127 power(16, timerControl.prescalar);
128 DPRINTF(Timer, "-- returning counter at %d\n", time);
120 break;
121 case TimerCounterReg:
122 DPRINTF(Timer, "Event schedule for timer %d, clock=%d, prescale=%d\n",
123 timerZeroEvent.when(), parent->clockPeriod(),
124 timerControl.prescalar);
125 time = timerZeroEvent.when() - curTick();
126 time = time / parent->clockPeriod() /
127 power(16, timerControl.prescalar);
128 DPRINTF(Timer, "-- returning counter at %d\n", time);
129 pkt->set(time);
129 pkt->setLE<uint32_t>(time);
130 break;
131 case TimerControlReg:
130 break;
131 case TimerControlReg:
132 pkt->set(timerControl);
132 pkt->setLE<uint32_t>(timerControl);
133 break;
134 case TimerIntStatusReg:
133 break;
134 case TimerIntStatusReg:
135 pkt->set(rawIntTimer);
135 pkt->setLE<uint32_t>(rawIntTimer);
136 break;
137 case WatchdogLoadReg:
136 break;
137 case WatchdogLoadReg:
138 pkt->set(watchdogLoadValue);
138 pkt->setLE<uint32_t>(watchdogLoadValue);
139 break;
140 case WatchdogCounterReg:
141 DPRINTF(Timer,
142 "Event schedule for watchdog %d, clock=%d, prescale=%d\n",
143 watchdogZeroEvent.when(), parent->clockPeriod(),
144 watchdogControl.prescalar);
145 time = watchdogZeroEvent.when() - curTick();
146 time = time / parent->clockPeriod() /
147 power(16, watchdogControl.prescalar);
148 DPRINTF(Timer, "-- returning counter at %d\n", time);
139 break;
140 case WatchdogCounterReg:
141 DPRINTF(Timer,
142 "Event schedule for watchdog %d, clock=%d, prescale=%d\n",
143 watchdogZeroEvent.when(), parent->clockPeriod(),
144 watchdogControl.prescalar);
145 time = watchdogZeroEvent.when() - curTick();
146 time = time / parent->clockPeriod() /
147 power(16, watchdogControl.prescalar);
148 DPRINTF(Timer, "-- returning counter at %d\n", time);
149 pkt->set(time);
149 pkt->setLE<uint32_t>(time);
150 break;
151 case WatchdogControlReg:
150 break;
151 case WatchdogControlReg:
152 pkt->set(watchdogControl);
152 pkt->setLE<uint32_t>(watchdogControl);
153 break;
154 case WatchdogIntStatusReg:
153 break;
154 case WatchdogIntStatusReg:
155 pkt->set(rawIntWatchdog);
155 pkt->setLE<uint32_t>(rawIntWatchdog);
156 break;
157 case WatchdogResetStatusReg:
156 break;
157 case WatchdogResetStatusReg:
158 pkt->set(rawResetWatchdog);
158 pkt->setLE<uint32_t>(rawResetWatchdog);
159 break;
160 case WatchdogDisableReg:
161 panic("Tried to read from WatchdogDisableRegister\n");
162 break;
163 default:
164 panic("Tried to read CpuLocalTimer at offset %#x\n", daddr);
165 break;
166 }

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192 bool old_enable;
193 bool old_wd_mode;
194 uint32_t old_val;
195
196 switch (daddr) {
197 case TimerLoadReg:
198 // Writing to this register also resets the counter register and
199 // starts decrementing if the counter is enabled.
159 break;
160 case WatchdogDisableReg:
161 panic("Tried to read from WatchdogDisableRegister\n");
162 break;
163 default:
164 panic("Tried to read CpuLocalTimer at offset %#x\n", daddr);
165 break;
166 }

--- 25 unchanged lines hidden (view full) ---

192 bool old_enable;
193 bool old_wd_mode;
194 uint32_t old_val;
195
196 switch (daddr) {
197 case TimerLoadReg:
198 // Writing to this register also resets the counter register and
199 // starts decrementing if the counter is enabled.
200 timerLoadValue = pkt->get();
200 timerLoadValue = pkt->getLE<uint32_t>();
201 restartTimerCounter(timerLoadValue);
202 break;
203 case TimerCounterReg:
204 // Can be written, doesn't start counting unless the timer is enabled
201 restartTimerCounter(timerLoadValue);
202 break;
203 case TimerCounterReg:
204 // Can be written, doesn't start counting unless the timer is enabled
205 restartTimerCounter(pkt->get());
205 restartTimerCounter(pkt->getLE<uint32_t>());
206 break;
207 case TimerControlReg:
208 old_enable = timerControl.enable;
206 break;
207 case TimerControlReg:
208 old_enable = timerControl.enable;
209 timerControl = pkt->get();
209 timerControl = pkt->getLE<uint32_t>();
210 if ((old_enable == 0) && timerControl.enable)
211 restartTimerCounter(timerLoadValue);
212 break;
213 case TimerIntStatusReg:
214 rawIntTimer = false;
215 if (pendingIntTimer) {
216 pendingIntTimer = false;
217 DPRINTF(Timer, "Clearing interrupt\n");
218 }
219 break;
220 case WatchdogLoadReg:
210 if ((old_enable == 0) && timerControl.enable)
211 restartTimerCounter(timerLoadValue);
212 break;
213 case TimerIntStatusReg:
214 rawIntTimer = false;
215 if (pendingIntTimer) {
216 pendingIntTimer = false;
217 DPRINTF(Timer, "Clearing interrupt\n");
218 }
219 break;
220 case WatchdogLoadReg:
221 watchdogLoadValue = pkt->get();
221 watchdogLoadValue = pkt->getLE<uint32_t>();
222 restartWatchdogCounter(watchdogLoadValue);
223 break;
224 case WatchdogCounterReg:
225 // Can't be written when in watchdog mode, but can in timer mode
226 if (!watchdogControl.watchdogMode) {
222 restartWatchdogCounter(watchdogLoadValue);
223 break;
224 case WatchdogCounterReg:
225 // Can't be written when in watchdog mode, but can in timer mode
226 if (!watchdogControl.watchdogMode) {
227 restartWatchdogCounter(pkt->get());
227 restartWatchdogCounter(pkt->getLE<uint32_t>());
228 }
229 break;
230 case WatchdogControlReg:
231 old_enable = watchdogControl.enable;
232 old_wd_mode = watchdogControl.watchdogMode;
228 }
229 break;
230 case WatchdogControlReg:
231 old_enable = watchdogControl.enable;
232 old_wd_mode = watchdogControl.watchdogMode;
233 watchdogControl = pkt->get();
233 watchdogControl = pkt->getLE<uint32_t>();
234 if ((old_enable == 0) && watchdogControl.enable)
235 restartWatchdogCounter(watchdogLoadValue);
236 // cannot disable watchdog using control register
237 if ((old_wd_mode == 1) && watchdogControl.watchdogMode == 0)
238 watchdogControl.watchdogMode = 1;
239 break;
240 case WatchdogIntStatusReg:
241 rawIntWatchdog = false;
242 if (pendingIntWatchdog) {
243 pendingIntWatchdog = false;
244 DPRINTF(Timer, "Clearing watchdog interrupt\n");
245 }
246 break;
247 case WatchdogResetStatusReg:
248 rawResetWatchdog = false;
249 DPRINTF(Timer, "Clearing watchdog reset flag\n");
250 break;
251 case WatchdogDisableReg:
252 old_val = watchdogDisableReg;
234 if ((old_enable == 0) && watchdogControl.enable)
235 restartWatchdogCounter(watchdogLoadValue);
236 // cannot disable watchdog using control register
237 if ((old_wd_mode == 1) && watchdogControl.watchdogMode == 0)
238 watchdogControl.watchdogMode = 1;
239 break;
240 case WatchdogIntStatusReg:
241 rawIntWatchdog = false;
242 if (pendingIntWatchdog) {
243 pendingIntWatchdog = false;
244 DPRINTF(Timer, "Clearing watchdog interrupt\n");
245 }
246 break;
247 case WatchdogResetStatusReg:
248 rawResetWatchdog = false;
249 DPRINTF(Timer, "Clearing watchdog reset flag\n");
250 break;
251 case WatchdogDisableReg:
252 old_val = watchdogDisableReg;
253 watchdogDisableReg = pkt->get();
253 watchdogDisableReg = pkt->getLE<uint32_t>();
254 // if this sequence is observed, turn off watchdog mode
255 if (old_val == 0x12345678 && watchdogDisableReg == 0x87654321)
256 watchdogControl.watchdogMode = 0;
257 break;
258 default:
259 panic("Tried to write CpuLocalTimer timer at offset %#x\n", daddr);
260 break;
261 }

--- 189 unchanged lines hidden --- 		254 // if this sequence is observed, turn off watchdog mode
255 if (old_val == 0x12345678 && watchdogDisableReg == 0x87654321)
256 watchdogControl.watchdogMode = 0;
257 break;
258 default:
259 panic("Tried to write CpuLocalTimer timer at offset %#x\n", daddr);
260 break;
261 }

--- 189 unchanged lines hidden ---