smmu_v3_transl.hh (14063:fc05dc40f6d1) smmu_v3_transl.hh (14100:6ef1220dc6da)
1/*
2 * Copyright (c) 2013, 2018-2019 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 59 unchanged lines hidden (view full) ---

68 {
69 bool stage1Enable;
70 bool stage2Enable;
71 Addr ttb0, ttb1, httb;
72 uint16_t asid;
73 uint16_t vmid;
74 uint8_t stage1TranslGranule;
75 uint8_t stage2TranslGranule;
1/*
2 * Copyright (c) 2013, 2018-2019 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 59 unchanged lines hidden (view full) ---

68 {
69 bool stage1Enable;
70 bool stage2Enable;
71 Addr ttb0, ttb1, httb;
72 uint16_t asid;
73 uint16_t vmid;
74 uint8_t stage1TranslGranule;
75 uint8_t stage2TranslGranule;
76 uint8_t t0sz;
77 uint8_t s2t0sz;
76 };
77
78 enum FaultType
79 {
80 FAULT_NONE,
81 FAULT_TRANSLATION, // F_TRANSLATION
82 FAULT_PERMISSION, // F_PERMISSION
83 };

--- 101 unchanged lines hidden --- 		78 };
79
80 enum FaultType
81 {
82 FAULT_NONE,
83 FAULT_TRANSLATION, // F_TRANSLATION
84 FAULT_PERMISSION, // F_PERMISSION
85 };

--- 101 unchanged lines hidden ---