1/*
2 * Copyright (c) 2013, 2018-2019 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
--- 159 unchanged lines hidden (view full) ---
168 const StreamTableEntry &ste, uint32_t sid, uint32_t ssid);
169 void doReadConfig(Yield &yield, Addr addr, void *ptr, size_t size,
170 uint32_t sid, uint32_t ssid);
171 void doReadPTE(Yield &yield, Addr va, Addr addr, void *ptr,
172 unsigned stage, unsigned level);
173
174 public:
175 SMMUTranslationProcess(const std::string &name, SMMUv3 &_smmu,
176 SMMUv3SlaveInterface &_ifc);
177
178 virtual ~SMMUTranslationProcess();
179
180 void beginTransaction(const SMMUTranslRequest &req);
181 void resumeTransaction();
182};
183
184#endif /* __DEV_ARM_SMMU_V3_TRANSL_HH__ */
2 * Copyright (c) 2013, 2018-2019 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
--- 159 unchanged lines hidden (view full) ---
168 const StreamTableEntry &ste, uint32_t sid, uint32_t ssid);
169 void doReadConfig(Yield &yield, Addr addr, void *ptr, size_t size,
170 uint32_t sid, uint32_t ssid);
171 void doReadPTE(Yield &yield, Addr va, Addr addr, void *ptr,
172 unsigned stage, unsigned level);
173
174 public:
175 SMMUTranslationProcess(const std::string &name, SMMUv3 &_smmu,
176 SMMUv3SlaveInterface &_ifc);
177
178 virtual ~SMMUTranslationProcess();
179
180 void beginTransaction(const SMMUTranslRequest &req);
181 void resumeTransaction();
182};
183
184#endif /* __DEV_ARM_SMMU_V3_TRANSL_HH__ */