1/* 2 * Copyright (c) 2013, 2018-2019 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 64 unchanged lines hidden (view full) --- 73 req.isWrite = false; 74 req.isPrefetch = true; 75 req.isAtsRequest = false; 76 req.pkt = NULL; 77 78 return req; 79} 80 |
81SMMUTranslationProcess::SMMUTranslationProcess(const std::string &name, 82 SMMUv3 &_smmu, SMMUv3SlaveInterface &_ifc) 83 : 84 SMMUProcess(name, _smmu), 85 ifc(_ifc) 86{ 87 // Decrease number of pending translation slots on the slave interface 88 assert(ifc.xlateSlotsRemaining > 0); 89 ifc.xlateSlotsRemaining--; 90 reinit(); 91} 92 93SMMUTranslationProcess::~SMMUTranslationProcess() 94{ 95 // Increase number of pending translation slots on the slave interface 96 ifc.xlateSlotsRemaining++; 97} 98 |
99void 100SMMUTranslationProcess::beginTransaction(const SMMUTranslRequest &req) 101{ 102 request = req; 103 104 reinit(); 105} 106 --- 1079 unchanged lines hidden (view full) --- 1186SMMUTranslationProcess::issuePrefetch(Addr addr) 1187{ 1188 if (!smmu.system.isTimingMode()) 1189 return; 1190 1191 if (!ifc.prefetchEnable || ifc.xlateSlotsRemaining == 0) 1192 return; 1193 |
1194 std::string proc_name = csprintf("%sprf", name()); 1195 SMMUTranslationProcess *proc = 1196 new SMMUTranslationProcess(proc_name, smmu, ifc); 1197 1198 proc->beginTransaction( 1199 SMMUTranslRequest::prefetch(addr, request.sid, request.ssid)); 1200 proc->scheduleWakeup(smmu.clockEdge(Cycles(1))); 1201} --- 10 unchanged lines hidden (view full) --- 1212 1; 1213 1214 doSemaphoreDown(yield, smmu.masterPortSem); 1215 doDelay(yield, Cycles(numMasterBeats)); 1216 doSemaphoreUp(smmu.masterPortSem); 1217 1218 1219 smmu.translationTimeDist.sample(curTick() - recvTick); |
1220 if (!request.isAtsRequest && request.isWrite) 1221 ifc.wrBufSlotsRemaining += 1222 (request.size + (ifc.portWidth-1)) / ifc.portWidth; 1223 1224 smmu.scheduleSlaveRetries(); 1225 1226 1227 SMMUAction a; --- 31 unchanged lines hidden (view full) --- 1259 a.delay = 0; 1260 yield(a); 1261 } 1262} 1263 1264void 1265SMMUTranslationProcess::completePrefetch(Yield &yield) 1266{ |
1267 SMMUAction a; 1268 a.type = ACTION_TERMINATE; 1269 a.pkt = NULL; 1270 a.ifc = &ifc; 1271 a.delay = 0; 1272 yield(a); 1273} 1274 --- 182 unchanged lines hidden --- |